ADAU1787BCBZRL

Overview

The ADAU1787BCBZRL is a low-power audio codec integrating four analog-to-digital converters (ADCs) and two digital-to-analog converters (DACs) with dual digital signal processors. It supports sample rates up to 768 kHz and features a 28-bit SigmaDSP core operating at 50 MIPS alongside a programmable FastDSP engine. The device provides 96 dB SNR for ADCs and 105 dB combined SNR for DACs, with a group delay of 5 μs using FastDSP bypass. Power supplies include AVDD at 1.8 V typical, IOVDD from 1.1 V to 1.98 V, and DVDD at 0.9 V typical. It utilizes a 42-ball WLCSP package measuring 2.695 mm × 2.320 mm.

Feature Summary

• Dual-core architecture combining a 50 MIPS SigmaDSP for complex audio processing and a dedicated FastDSP engine optimized for ultra-low latency noise cancellation tasks.
• Integrated asynchronous sample rate converters (ASRCs) enable full-duplex operation across multiple channels, supporting flexible routing between serial audio ports and DSP cores.
• Supports both analog microphone/line inputs and digital microphone interfaces, allowing versatile connectivity for various sensor arrays in compact form factors.

Applications

• Noise cancelling handsets, headsets, and headphones
• Bluetooth ANC handsets, headsets, and headphones
• Personal navigation devices
• Digital still and video cameras
• Musical instrument effect processors

Procurement Notes

Verify the specific ordering suffix BCBZRL against the manufacturer's current datasheet revision to confirm packaging details and availability status. Ensure that the design environment supports the required voltage levels for AVDD, IOVDD, and DVDD as specified in the power supply section. Cross-reference the pinout configuration with the latest outline dimensions document prior to PCB layout finalization.

Selection Notes

Select this component when designing systems requiring simultaneous high-channel-count audio input and output with integrated active noise control capabilities. The inclusion of dedicated hardware accelerators for filtering and mixing reduces host processor load. Evaluate the thermal performance within the small WLCSP footprint if operating near maximum clock frequencies or under continuous heavy DSP utilization loads.

Part Context

This part belongs to the Analog Devices ADAU1787 family of audio codecs designed specifically for portable audio applications. It serves as a complete solution for headset implementations by combining data conversion, signal processing, and control interfaces into a single miniature package. The device is intended to replace discrete amplifier and DSP combinations in space-constrained consumer electronics.

Replacement Considerations

Consult the official Analog Devices ordering guide for direct equivalents or updated revisions within the ADAU1787 series. Verify compatibility with existing firmware libraries and SigmaStudio configurations if migrating from previous versions of the device.

FAQ

What is the minimum group delay achievable with the ADAU1787?

The device achieves a group delay of 5 μs from analog input to analog output when utilizing the FastDSP bypass mode with zero instructions at a sampling frequency of 768 kHz.

How many digital microphone inputs does the ADAU1787 support?

The ADAU1787 supports eight digital microphone inputs in addition to its four single-ended analog inputs.

What control interfaces are available for configuring the device?

Configuration is managed via I²C and SPI control interfaces, which also support self-boot functionality from an external I²C EEPROM.