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The Analog Devices Inc. ADAU1861BCSZ-RL is a low-power audio codec featuring three analog-to-digital converters (ADCs) and one digital-to-analog converter (DAC), integrated with two digital signal processors (DSPs). It supports serial-port sample rates from 8 kHz to 768 kHz, achieving a group delay of 5 μs at 768 kHz in FastDSP bypass mode. The device provides an SNR of 106 dB for the ADC path and 110 dB for the combined DAC and headphone output. Power supplies include AVDD at 1.8 V typical, IOVDD from 1.1 V to 1.98 V, DVDD from 0.85 V to 1.21 V, and HPVDD_L from 1.2 V to AVDD. It is housed in a 64-lead lead frame chip scale package measuring 9 mm × 9 mm.
Verify that the specific ordering suffix BC corresponds to the intended package variant and automotive qualification status. Confirm that the component meets AEC-Q100 standards if required for the target application environment. Ensure all supply voltage rails match the specified operational ranges during system design validation.
Select this component when a high channel count with integrated DSP capabilities is required within a compact footprint. The inclusion of multiple ASRCs facilitates seamless integration with various clock domains in complex audio architectures. Evaluate power consumption profiles across different operating modes to ensure compliance with thermal and energy constraints.
This part belongs to the ADAU1861 family of low-power audio codecs designed by Analog Devices. It shares architectural similarities with other SigmaDSP-based devices but distinguishes itself through its specific combination of three ADCs, one DAC, and dual processor cores optimized for automotive and professional audio applications.
Direct replacements must maintain compatibility with the 64-lead LFCSP package and support similar power supply configurations. Verify that alternative components offer comparable DSP performance and interface protocols to ensure seamless integration without requiring significant schematic modifications.