ADCMP563BRQZ

Overview

The ADCMP563BRQZ is a dual high-speed ECL comparator manufactured by Analog Devices Inc. on the proprietary XFCB process. It features a 700 ps propagation delay with less than 75 ps overdrive dispersion and an input common-mode range from −2.0 V to +3.0 V. The device provides differential ECL-compatible outputs capable of driving 50 Ω transmission lines terminated to −2 V. It includes latch enable inputs for track-and-hold or sample-and-hold modes, internal pull-up resistors, and power supply rejection greater than 85 dB. The BRQZ suffix indicates a 16-lead QSOP package. It operates within an industrial temperature range of −40°C to +85°C.

Feature Summary

• Differential ECL-compatible outputs compatible with ECL 10K and 10KH logic families
• Differential latch control enabling tracking, track-and-hold, or sample-and-hold operation
• Internal latch pull-up resistors that default the latch to tracking mode when unconnected
• Robust input protection against electrostatic discharge

Applications

• Automatic test equipment
• High speed instrumentation
• Scope and logic analyzer front ends
• Window comparators
• Clock drivers

Procurement Notes

Verify the specific ordering suffix BRQZ corresponds to the 16-lead QSOP package variant. Confirm the datasheet revision matches the required specifications. Ensure the application environment remains within the specified −40°C to +85°C operating temperature range. Validate that the power supply configuration aligns with the dual supply requirements detailed in the electrical characteristics table.

Selection Notes

Select this component for applications requiring consistent propagation delay across varying signal conditions due to its low overdrive dispersion. The differential input stage supports a wide common-mode voltage range suitable for diverse signal levels. Consider the ADCMP564 if programmable hysteresis functionality is required, as the ADCMP563 lacks this specific feature. Ensure proper termination techniques are utilized to maintain high-speed performance.

Part Context

The ADCMP563/ADCMP564 series consists of dual high-speed comparators fabricated using Analog Devices' XFCB process technology. This family is designed for critical timing applications where propagation delay consistency is paramount. The devices offer complementary digital outputs and support various operational modes through dedicated latch inputs, making them suitable for demanding industrial and measurement environments.

Replacement Considerations

The ADCMP564 serves as a functional substitute within the same family, distinguished by the inclusion of a programmable hysteresis pin. Verify that the absence of hysteresis in the ADCMP563 does not impact the specific circuit design requirements before selecting it as a replacement.

FAQ

How does the ADCMP563 handle unused comparator stages?

Unused comparator inputs should not be left floating. To prevent oscillation caused by high internal gain, the inputs must be held at least one diode drop apart, and the Latch Enable inputs should be appropriately connected.

What is the function of the internal pull-up resistors on the latch inputs?

The internal pull-up resistors on the Latch Enable pins ensure that the comparator defaults to tracking mode when the latch inputs are left unconnected.