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The ADCMP564BRQ is a dual high-speed ECL comparator fabricated on Analog Devices' proprietary XFCB process. It features a 700 ps propagation delay with less than 75 ps overdrive dispersion. The device includes differential latch control for tracking, track-and-hold, or sample-and-hold modes. Outputs are complementary digital signals compatible with ECL 10 K and 10 KH logic families, capable of driving 50 Ω transmission lines terminated to −2 V. A key differentiator is the separate programmable hysteresis pin available exclusively on this model.
Verify the specific ordering suffix matches the required package configuration. Confirm that the programmable hysteresis feature aligns with system requirements, as this distinguishes the part from the standard ADCMP563 variant. Ensure power supply decoupling meets high-speed design guidelines to maintain specified performance levels.
Select this component when programmable hysteresis is required to mitigate noise in high-speed signal paths. It is suitable for applications needing consistent propagation delay across varying input overdrive conditions. Consider the 20-lead QSOP package constraints and ensure the circuit layout supports the necessary ECL termination standards for optimal signal integrity.
This device belongs to the ADCMP56x series of high-speed comparators manufactured using Analog Devices' XFCB technology. While sharing core specifications like propagation delay and input common-mode range with the ADCMP563, it is distinct due to its dedicated hysteresis control pins. The series is designed for industrial temperature ranges and robust operation in demanding electronic environments.
The ADCMP563 serves as a functional substitute if programmable hysteresis is not required. Verify pin compatibility, noting the ADCMP564 utilizes a 20-lead QSOP while the ADCMP563 uses a 16-lead QSOP. Electrical characteristics such as propagation delay and output drive capabilities remain comparable between the two models.