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The ADCMP671-1YUJZ-RL7 is a low-power voltage monitor featuring two comparators and a 400 mV reference. It operates on a supply voltage from 1.7 V to 5.5 V with a maximum quiescent current of 17 μA at 125°C. The device provides individually adjustable undervoltage and overvoltage thresholds using external resistors, allowing window monitoring of N rails with only N + 1 processor I/O. It includes an open-drain power good output and a dedicated overvoltage fault indication output. The component is housed in a low-profile 6-lead TSOT package and functions within a temperature range of -40°C to +125°C.
Verify the specific ordering suffix matches the required RoHS compliance and reel packaging configuration. Confirm that the thermal resistance characteristics align with the intended PCB layout and ambient operating conditions. Ensure the input voltage limits are respected during system design to prevent damage to the comparator inputs.
Select this component when low quiescent current is critical for extending battery life in portable systems. The adjustable threshold capability allows customization for various supply rail voltages without changing the core device. Verify that the open-drain output requirements match the downstream logic interface pull-up configurations.
This part belongs to the Analog Devices ADCMP671 series of voltage monitors. It is designed as a compact solution for power management in space-constrained environments. The 6-lead TSOT package offers a small footprint compared to larger packages while maintaining the necessary electrical isolation and thermal performance for industrial applications.
Direct replacements must maintain the 1.7 V to 5.5 V supply range and similar quiescent current specifications. Verify pin compatibility if substituting with other 6-lead TSOT voltage monitors. Ensure the replacement device supports the required N+1 monitoring scheme if used in multi-rail applications.
It allows users to monitor N supplies using only N + 1 processor I/O lines by tying the OV outputs together for a global fault signal while using individual PWRGD outputs for status.
The internal hysteresis prevents output oscillation caused by noise or slowly moving signals near the switching threshold, ensuring stable operation.