ADF4001BRUZ-R7

Overview

The ADF4001BRUZ-R7 is an Integer-N clock generator PLL from Analog Devices, packaged in a 16-lead TSSOP. It operates on a 2.7 V to 5.5 V supply with a typical current of 4.5 mA. The device features a 13-bit N counter and a 14-bit R counter, supporting RF input frequencies up to 200 MHz at 5 V and reference inputs up to 104 MHz. It includes a programmable charge pump with currents ranging from 625 µA to 5 mA, ultralow phase noise characteristics, and hardware/software power-down modes.

Feature Summary

• Ultralow phase noise floor of -161 dBc/Hz at 200 kHz offset
• Programmable charge pump currents via CPI bits (625 µA to 5 mA)
• Separate VP pin allows extended tuning voltage up to 6.0 V
• Hardware compatible with ADF4110/ADF4111/ADF4112/ADF4113

Applications

• Clock generation for low jitter applications
• Low frequency PLL implementations
• SONET, ATM, ADM, DSLAM, SDM systems
• Frequency translation circuits

Procurement Notes

Verify the -R7 suffix indicates reel packaging when sourcing. Confirm the B version industrial temperature range (-40°C to +85°C) matches system requirements. Ensure AVDD and DVDD are decoupled closely to ground planes as specified in the datasheet.

Selection Notes

Select this component for designs requiring stable reference signals with minimal phase noise. The separate VP supply is critical if the external VCO requires tuning voltages exceeding the logic supply. Verify that the required PFD frequency does not exceed the 55 MHz maximum limit.

Part Context

This part belongs to the ADF4001 family of clock generators. It is functionally similar to the ADF4002 but optimized for specific bandwidth and noise profiles. The BRUZ suffix denotes the TSSOP package variant within the broader ADF4001 product line.

Replacement Considerations

The ADF4001BCPZ-RL7 offers the same functionality in a 20-lead LFCSP package. Direct pin-to-pin replacement is not possible due to the different footprint; PCB redesign is required.