— IC芯片 | 连接器 | 传感器 | 被动器件 —
Product Detailed Parameters
- Description:IC CLK/FREQ SYNTH 16TSSOP
- Series:-
- Package:Tape & Reel (TR),Cut Tape (CT)
- Mfr:Analog Devices Inc.
- PLL:Yes
- Input:CMOS, TTL
- Output:Clock
- Number of Circuits:1
- Ratio - Input:Output:2:01
- Differential - Input:Output:Yes/No
- Frequency - Max:6GHz
- Divider/Multiplier:Yes/No
- Voltage - Supply:2.7V ~ 3.3V
- Operating Temperature:-40°C ~ 85°C
- Mounting Type:Surface Mount
- Package / Case:16-TSSOP (0.173", 4.40mm Width)
- Supplier Device Package:16-TSSOP
- Type:Clock/Frequency Synthesizer (RF)
- Grade:-
- Qualification:-
Download product information
Overview
The ADF4106BRUZ-RL is an integer-N PLL frequency synthesizer from Analog Devices Inc., packaged in a 16-lead TSSOP. It operates with a supply voltage of 2.7 V to 3.3 V and supports RF input frequencies up to 6.0 GHz. Key electrical parameters include a maximum power supply current of 13 mA, a charge pump sink/source current range of 625 µA to 5 mA, and a normalized phase noise floor of –223 dBc/Hz. The device features a programmable dual-modulus prescaler (8/9, 16/17, 32/33, or 64/65), a 14-bit reference counter, and a 3-wire serial interface for configuration.
Feature Summary
- Integrated low-noise digital phase frequency detector and precision charge pump
- Programmable dual-modulus prescaler options: 8/9, 16/17, 32/33, 64/65
- Separate charge pump supply pin (VP) allows extended tuning voltage up to 5.5 V
- Analog and digital lock detect capabilities with programmable antibacklash pulse width
Applications
- Broadband wireless access systems
- Satellite communication systems
- Wireless LAN infrastructure
- Base stations for wireless radios
- General instrumentation requiring local oscillators
Procurement Notes
Verify the suffix 'RL' indicates tape and reel packaging when ordering. Confirm that the B version meets the required industrial temperature range of –40°C to +85°C. Ensure the external loop filter and VCO are compatible with the specified RF input sensitivity and charge pump current limits.
Selection Notes
Select the appropriate dual-modulus prescaler setting based on the target RF frequency to ensure the divided output remains below the CMOS counter limit of 325 MHz. Verify that the RSET resistor value correctly sets the desired charge pump current within the 3.0 kΩ to 11 kΩ range. Check that the VP supply voltage does not exceed 5.5 V while remaining greater than or equal to AVDD.
Part Context
This component belongs to the ADF4106 family of high-performance integer-N PLLs. It is designed to simplify system architecture by eliminating frequency doublers in high-frequency applications due to its wide bandwidth. The BRUZ-RL variant specifically denotes the surface-mount TSSOP package with reel packaging.
Replacement Considerations
Public confirmed substitute part numbers are not available in the provided documentation.
ChipApex | Global Electronic Components Supplier








