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Product Detailed Parameters
- Description:IC PLL FREQ SYNTHESIZER 20-LFCSP
- Series:*
- Package:Bag
- Mfr:Analog Devices Inc.
- PLL:Yes
- Input:Clock
- Output:Clock
- Number of Circuits:-
- Ratio - Input:Output:2:01
- Differential - Input:Output:Yes/No
- Frequency - Max:4GHz
- Divider/Multiplier:Yes/No
- Voltage - Supply:2.7V ~ 5.5V
- Operating Temperature:-
- Mounting Type:Surface Mount
- Package / Case:20-WFQFN Exposed Pad, CSP
- Supplier Device Package:20-LFCSP (4x4)
- Type:Clock/Frequency Synthesizer (RF)
- Grade:-
- Qualification:-
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Overview
The ADF4113BCP is an integer-N RF PLL frequency synthesizer from Analog Devices, designed for local oscillator implementation in wireless transceivers. It features a low-noise digital phase-frequency detector, precision charge pump, and programmable dual-modulus prescaler (8/9, 16/17, 32/33, 64/65). The device operates with a supply voltage of 2.7 V to 5.5 V and supports a maximum RF input frequency of 4.0 GHz. Key specifications include a typical operating current of 8.5 mA at 5 V, a programmable charge pump current range up to 5 mA, and a normalized phase noise floor of −215 dBc/Hz. It utilizes a 3-wire serial interface for register control.
Feature Summary
- Maximum RF input frequency of 4.0 GHz
- Programmable dual-modulus prescaler options: 8/9, 16/17, 32/33, 64/65
- Separate charge pump supply (VP) allows extended tuning voltage in 3 V systems
- Analog and digital lock detect capabilities
Applications
- Base stations for wireless radio (GSM, PCS, DCS, CDMA, WCDMA)
- Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA)
- Communications test equipment
Procurement Notes
Verify the specific package variant against the required footprint. The datasheet indicates LFCSP and TSSOP packages are available within the ADF4110 family; confirm the BCP suffix corresponds to the LFCSP-20 package as listed in distributor catalogs. Ensure environmental compliance documentation matches the project requirements before finalizing procurement.
Selection Notes
Select the ADF4113 when the application requires a local oscillator frequency up to 4.0 GHz. Consider the separate VP pin if the system uses a 3 V supply but requires higher VCO tuning voltages. Verify that the prescaler division ratio selected keeps the feedback frequency below the maximum allowable prescaler output frequency of 200 MHz at 5 V operation.
Part Context
The ADF4113 is part of the ADF4110 family of single-channel, integer-N PLLs. This family shares a common architecture including a low-noise digital PFD, programmable reference divider, and A/B counters. Other members include the ADF4110 (550 MHz), ADF4111 (1.2 GHz), and ADF4112 (3.0 GHz), differentiated primarily by their maximum RF input frequencies.
Replacement Considerations
Public confirmed substitute part numbers are not provided in the source material.
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