ADP7112ACBZ-2.5-R7

Overview

The ADP7112ACBZ-2.5-R7 is a CMOS low dropout linear regulator manufactured by Analog Devices Inc., featuring a fixed 2.5 V output and a maximum load current of 200 mA. It operates within an input voltage range of 2.7 V to 20 V, delivering high power supply rejection ratios of 88 dB at 10 kHz and 68 dB at 100 kHz. The device exhibits low noise performance with an RMS output noise of 11 μV across the 10 Hz to 100 kHz bandwidth. Quiescent current consumption is typically 50 μA under no-load conditions, dropping to 1.8 μA during shutdown. Initial output voltage accuracy is maintained within ±0.8%, expanding to ±1.8% over the full operating temperature range of −40°C to +125°C.

Feature Summary

• Ultra-low noise architecture providing 11 μV rms output noise independent of the fixed output voltage setting.
• High power supply rejection ratio ensuring effective filtering of input supply variations across wide frequency ranges.
• User-programmable soft start capability allowing control over inrush current and startup sequencing via an external capacitor.
• Precision enable pin with defined logic thresholds and hysteresis for reliable system power management.

Applications

• Regulation for noise-sensitive analog-to-digital and digital-to-analog converter circuits.
• Powering precision amplifiers and voltage-controlled oscillator tuning nodes.
• Infrastructure and communications equipment requiring stable low-noise rails.
• Medical and healthcare instrumentation demanding high signal integrity.

Procurement Notes

Verify the specific ordering suffix matches the required package configuration and tape-and-reel specifications before finalizing procurement. Confirm that the fixed 2.5 V output variant aligns precisely with the target circuit design requirements. Ensure compatibility with standard surface-mount assembly processes given the WLCSP footprint dimensions.

Selection Notes

Select this component when designing systems requiring a high-voltage input rail down to a low-voltage output without excessive heat dissipation. Consider the minimum 2.2 μF ceramic output capacitor requirement for stability. Evaluate thermal resistance parameters against expected ambient temperatures and PCB layout constraints to ensure junction temperatures remain within safe operational limits.

Part Context

This part belongs to the ADP7112 family of low noise CMOS LDO regulators designed for high-performance mixed-signal applications. The series supports various fixed output voltages ranging from 1.2 V to 5.0 V, alongside adjustable configurations. It utilizes a proprietary architecture optimized for small form factor implementations while maintaining excellent transient response characteristics.

Replacement Considerations

Direct substitutes include other ADP7112 variants with different fixed output voltages such as ADP7112ACBZ-1.8-R7 or ADP7112ACBZ-3.3-R7, provided the voltage level adjustment is acceptable for the application.