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ADP7158ACPZ-3.3-R7
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Product Detailed Parameters
- Description：IC REG LINEAR 3.3V 2A 10LFCSP
- Series：-
- Mfr：Analog Devices Inc.
- Package：Tape & Reel (TR),Cut Tape (CT)
- Output Configuration：Positive
- Output Type：Fixed
- Number of Regulators：1
- Voltage - Input (Max)：5.5V
- Voltage - Output (Min/Fixed)：3.3V
- Voltage - Output (Max)：-
- Voltage Dropout (Max)：0.28V @ 2A
- Current - Output：2A
- Current - Quiescent (Iq)：8 mA
- Current - Supply (Max)：14 mA
- PSRR：70dB ~ 50dB (1kHz ~ 1MHz)
- Control Features：Enable
- Protection Features：Over Current, Over Temperature, Under Voltage Lockout (UVLO)
- Operating Temperature：-40°C ~ 125°C
- Mounting Type：Surface Mount
- Package / Case：10-VFDFN Exposed Pad, CSP
- Supplier Device Package：10-LFCSP-WD (3x3)
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Overview
The ADP7158ACPZ-3.3-R7 is a fixed-output linear regulator from Analog Devices, providing a stable 3.3 V output with a maximum load current of 2 A. It operates within an input voltage range of 2.3 V to 5.5 V and features ultralow noise characteristics, including 0.9 µV rms integrated noise (100 Hz to 100 kHz) and 1.7 nV/√Hz spectral density (10 kHz to 1 MHz). The device achieves high power supply rejection ratio (PSRR) of 70 dB at low frequencies and 50 dB at 1 MHz. It maintains excellent line and load regulation with a typical dropout voltage of 200 mV at full load. Designed for RF applications, it supports operation over a temperature range of -40°C to +125°C.
Feature Summary
- Ultralow noise architecture optimized for radio frequency circuits
- High power supply rejection ratio across wide frequency bands
- Precision enable pin with programmable logic thresholds
- Stable operation with standard ceramic output capacitors
Applications
- Phase-locked loops (PLLs)
- Voltage controlled oscillators (VCOs)
- Communications infrastructure systems
- Backhaul and microwave links
Procurement Notes
Verify the specific ordering suffix against the manufacturer's official documentation to confirm package type and tape-and-reel specifications. Ensure compatibility with PCB layout requirements regarding thermal dissipation and capacitor placement. Confirm that the fixed 3.3 V output aligns with system design constraints before procurement.
Selection Notes
Select this component for designs requiring high current delivery with minimal noise interference. Evaluate thermal performance based on expected power dissipation and ambient conditions. Consider the precision enable feature if strict power sequencing or logic-level control is required. Verify input voltage headroom to ensure operation remains within specified dropout limits under all load conditions.
Part Context
This part belongs to the ADP7158 family of ultralow noise RF linear regulators. It shares architectural similarities with the ADP7156, ADP7157, and ADP7159 series but offers distinct output current capabilities and fixed voltage options. The device utilizes a proprietary PMOS pass transistor design to achieve superior transient response and noise performance compared to standard LDOs.
Replacement Considerations
ADP7159ACPZ-3.3-R7
FAQ
What is the minimum recommended output capacitance for stability?
A minimum of 10 µF ceramic output capacitor is recommended to ensure stability and optimal transient response.
How does the BYP capacitor affect noise performance?
Increasing the BYP capacitor value reduces output noise below 1 kHz, though it may increase the start-up time of the regulator.
