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The AFS600-2PQ208I is a Fusion mixed-signal FPGA featuring 600,000 system gates and 13,824 tiles. It utilizes an advanced 130-nm flash-based CMOS process with a single 3.3 V supply and an on-chip 1.5 V regulator. The device supports up to 172 digital I/Os across five banks, enabling mixed-voltage operation at 1.5 V, 1.8 V, 2.5 V, and 3.3 V. It includes 4 Mbits of embedded user flash memory, a 12-bit ADC with up to 600 Ksps sampling rate, and ten MOSFET gate driver outputs. Operating within an industrial temperature range of -40°C to +100°C, it achieves a maximum system performance frequency of 350 MHz.
Verify the specific ordering suffix against official Microsemi documentation to confirm package type and temperature grade. Confirm current availability status as product lifecycles may change. Ensure design files match the exact revision specified in the datasheet to avoid compatibility issues during implementation.
Select this model for designs requiring mixed-signal integration within a 208-pin PQFP package. Verify that the 172 available digital I/Os and 40 analog I/Os meet interface requirements. Ensure the 4 Mbit flash capacity is sufficient for both logic configuration and user data storage needs.
This component belongs to the Microsemi Fusion family of mixed-signal FPGAs. It shares architectural features with other devices in the series, such as the AFS250 and AFS1500, but offers higher logic density and more analog resources. The PQ208 package provides a pin-compatible option within the family for specific board layout constraints.
Publicly confirmed substitute part numbers are not available in the provided source material. Consult Microsemi technical support for potential obsolescence alternatives or next-generation device recommendations.