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The AGL060V2-CS121 is a Field Programmable Gate Array from the Microsemi IGLOO family, utilizing a 130-nm flash-based CMOS process. It provides 60,000 system gates and 1,536 VersaTiles (D-flip-flops). The device supports core voltages between 1.2 V and 1.5 V, enabling low-power active operation and Flash*Freeze mode consumption as low as 10 µW. It includes 18 kbits of SRAM organized in four 4,608-bit blocks and 1 kbit of FlashROM. The CS121 package offers 96 user I/Os with mixed-voltage support up to 3.3 V. This specific variant operates within the commercial temperature range.
Verify the ordering suffix matches the required voltage range and temperature grade. Confirm that the CS121 package dimensions align with the target PCB footprint. Ensure design tools support the specific IGLOO V2 generation features documented in the official datasheet.
Select this part when 60,000 system gates are sufficient for the logic density requirements. Consider the CS121 package if a compact 6x6 mm footprint with 96 I/Os is necessary. Verify that the 1.2 V to 1.5 V core voltage compatibility meets the system power budget constraints.
This component belongs to the IGLOO Low Power Flash FPGA family, which bridges the gap between ASIC costs and FPGA flexibility. It is designed for applications demanding low power, security, and instant-on functionality without external configuration memory.
Check for pin-compatible alternatives within the same IGLOO family, such as AGL030 or AGL125, depending on gate count needs. Ensure any substitute maintains the CS121 package type and V2 core voltage specifications.