SEARCH
— IC芯片 | 连接器 | 传感器 | 被动器件 —
The AGL1000V2-FGG484I is an industrial-grade IGLOO flash FPGA featuring 1,000,000 system gates and 24,576 VersaTiles. It operates within a core voltage range of 1.14 V to 1.575 V and supports a maximum user I/O count of 300 in the FG484 package. The device includes up to 144 kbits of true dual-port SRAM and 1 kbit of FlashROM. It utilizes a 130-nm process with integrated Clock Conditioning Circuits (CCC) and PLLs for clock management.
Verify the specific ordering suffix against official Microchip documentation to confirm temperature grade and packaging compliance. Ensure that design files account for the non-AES capabilities inherent to this component family. Confirm export control requirements prior to acquisition as restrictions may apply.
Select this model for designs requiring high gate density with instant-on functionality and robust security features. Verify that the required I/O voltage standards are supported by the available banks. Consider the package dimensions and pinout compatibility if migrating from lower-density devices within the same family.
This component belongs to the IGLOO family of low-power flash FPGAs manufactured by Microchip Technology. It represents a mid-to-high density option within the series, offering significant logic resources in a compact footprint suitable for space-constrained applications.
Check for pin-compatible alternatives such as the AGL1000 or M1AGL1000 variants. Verify functional equivalence regarding memory size and I/O capabilities when substituting with other devices in the IGLOO or IGLOOe families.
No, ARM-enabled IGLOO devices do not support AES decryption. However, standard IGLOO devices like the AGL1000V2 include AES-protected In-System Programming capabilities.
The typical power consumption in Flash*Freeze mode for the AGL1000 device is 53 µW.
Yes, the device supports bank-selectable I/O voltages, allowing up to 4 banks per chip to operate at different voltage levels such as 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V.