AGL600V2-FG484

Overview

The AGL600V2-FG484 is a flash-based Field Programmable Gate Array from the IGLOO family, manufactured by Microsemi. It provides 600,000 system gates and 13,824 VersaTiles (D-flip-flops). The device features up to 108 kbits of true dual-port SRAM organized in 4,608-bit blocks. It operates with a core voltage range of 1.2 V to 1.5 V and supports mixed-voltage I/O standards including LVCMOS 3.3 V, 2.5 V, 1.8 V, 1.5 V, and 1.2 V. The FG484 package contains 484 pins with a 1.0 mm pitch and measures 23 x 23 mm. It includes six Clock Conditioning Circuits (CCC), one with an integrated PLL, and supports AES-protected In-System Programming.

Feature Summary

• Flash*Freeze technology enables ultra-low power consumption while retaining FPGA content without reloading configuration data.
• Nonvolatile flash architecture eliminates the need for external boot PROMs, providing instant-on capabilities and firm-error immunity against high-energy neutrons.
• Integrated security features include FlashLock protection and AES-128 decryption engine for secure in-system programming.
• Advanced I/O structure supports mixed-voltage operation across multiple banks with programmable slew rates and drive strengths.

Applications

• Portable electronics requiring low static and dynamic power consumption
• Systems needing instant-on functionality and simplified initialization
• Secure remote field updates and intellectual property protection applications

Procurement Notes

Verify the specific ordering suffix to confirm temperature grade and packaging compliance. The 'V2' designation indicates support for the 1.2 V to 1.5 V core voltage range. Ensure the FG484 package dimensions and pinout match the target PCB footprint requirements. Confirm RoHS compliance status based on the final character of the part number.

Selection Notes

Select this device when 600,000 system gates are required within a compact BGA package. Consider the AGL600V2 variant over the V5 version if 1.2 V core voltage operation is necessary for lower power systems. Verify that the available I/O count meets interface requirements, as differential pairs reduce single-ended I/O availability. Check compatibility with existing design tools for IGLOO FPGAs.

Part Context

This component belongs to the IGLOO Low Power Flash FPGA family, which utilizes a 130-nm process. It shares architectural similarities with other devices in the series, such as the AGL400 and AGL1000, differing primarily in logic density and memory capacity. The FG484 package is footprint-compatible with the FG256 package within the same density class.

Replacement Considerations

Direct pin-compatible replacements within the same package include other AGL600 variants with different temperature grades or voltage ranges. Devices like the M1AGL600 offer similar gate counts but include ARM Cortex-M1 processor support and lack AES decryption features.