SEARCH
— IC芯片 | 连接器 | 传感器 | 被动器件 —
AK4424ET is listed in the ADCs/DACs - Special Purpose range at ChipApex. The manufacturer field lists Asahi Kasei Microdevices/AKM. Its product description is IC DAC 24BIT 2CH 16TSSOP. Review the specifications below when checking this part for your BOM.
The AK4424ET is a 5V 24-bit stereo delta-sigma DAC featuring an integrated single-ended 2Vrms output buffer. It utilizes AKM’s multi-bit modulator architecture to deliver high linearity and low distortion. The device supports sampling rates from 8kHz to 192kHz with selectable oversampling modes (32x, 64x, 128x). Key electrical specifications include a dynamic range of 105dB and THD+N of -92dB. It operates on a +4.5V to +5.5V supply and includes a charge pump for ground-referenced output generation.
Verify the specific ordering suffix 'ET' corresponds to the -20°C to +85°C operating temperature range and 16-pin TSSOP package. Confirm that the component is lead-free and halogen-free as per standard manufacturing specifications. Ensure compatibility with the required 5V power supply domain during procurement planning.
Select this component for applications requiring a 5V supply voltage and single-ended analog outputs. It is suitable for systems needing a built-in buffer without external amplification. Consider the 16-pin TSSOP package constraints for PCB layout. Verify that the host controller supports the I2S serial data interface and provides the necessary master clock frequencies (up to 1152fs).
The AK4424ET belongs to Asahi Kasei Microdevices' audio DAC portfolio. It shares architectural similarities with the AK4420 and AK4421 but differs in pinout configuration and specific feature availability, such as the integration of the digital de-emphasis filter controlled by the DEM pin. It is distinct from ADC or CODEC devices like the AK4688.
The AK4420 and AK4421 are related models within the same family. However, they differ in power supply requirements (AK4421 uses 3.0-3.6V) and pin configurations. Direct substitution requires verifying voltage levels and pin mapping compatibility.
It uses an internal charge pump circuit connected to pins CP, CN, and VEE. External capacitors with low ESR must be connected between these pins to develop the internal negative power supply rail.
The DZF (Digital Zero Detect Flag) pin goes high when both left and right channel input data remain at zero for 8192 LRCK cycles, indicating silence or no signal.
Yes, it supports 16/20-bit I2S formats by zeroing the unused LSBs of the 24-bit input word.
Explore related parts through Data Acquisition, Integrated Circuits (ICs), all product categories, ChipApex homepage.