AP7173-SPG-13

Overview

The AP7173-SPG-13 is a 1.5A low-dropout linear regulator in an SO-8EP package, featuring user-programmable soft-start and power-good output. It operates with an input voltage range of 1.0V to 5.5V and provides adjustable output voltages from 0.8V to 3.3V. The device maintains 2% accuracy over line, load, and temperature variations. Typical dropout voltage is 165mV at 1.5A with a 5V bias supply. It includes thermal shutdown and current limit protection.

Feature Summary

• User-programmable soft-start reduces inrush current and minimizes stress on the input power source during startup.
• Power-good output enables supply monitoring and sequencing for complex power management solutions.
• Stable with any type of output capacitor of 2.2µF or more, simplifying design requirements.
• Bias supply permits low VIN operation while maintaining good transient response.

Applications

• FPGA core and I/O voltage regulation
• DSP core and I/O voltage regulation
• Post-regulation applications requiring precise voltage control
• Systems with specific power-up and power-down sequencing requirements

Procurement Notes

Verify the part number suffix matches the required package and packaging format. The SPG-13 designation indicates the SO-8EP package with green molding compound and tape & reel packaging. Confirm RoHS compliance status if required by your manufacturing process. Ensure the ordering code aligns with the specific quantity per reel specified in the manufacturer's documentation.

Selection Notes

Select this component when a high-current LDO with programmable startup characteristics is needed. The separate VCC pin allows for optimized dropout performance under low input voltage conditions. Consider the thermal resistance and PCB layout requirements for heat dissipation, especially at high load currents. Verify that the external resistor values for voltage setting fall within recommended tolerance ranges for optimal accuracy.

Part Context

This component belongs to Diodes Incorporated's AP7173 family of low-dropout regulators. The family offers both DFN3030-10 and SO-8EP package options. The AP7173 series is designed for applications requiring robust power management features such as programmable soft-start and power-good signaling, distinguishing it from standard fixed-output LDOs.

Replacement Considerations

Check for direct pin-compatible alternatives within the same product family, such as the DFN3030-10 variant (AP7173-FNG-13), if package changes are acceptable. Verify that any substitute maintains the same electrical specifications, particularly the 1.5A current rating and programmable soft-start functionality.

FAQ

How is the output voltage adjusted?

The output voltage is set using an external resistor divider connected to the feedback pin, allowing adjustment from 0.8V to 3.3V based on the formula VOUT = 0.8 x (1 + R1/R2).

What determines the soft-start time?

The soft-start time is determined by connecting a capacitor between the SS pin and ground. The ramp time can be programmed from 0.1ms to 18ms depending on the capacitance value used.

Can the IN and VCC pins be tied together?

Yes, if a separate bias supply is not available, the IN and VCC pins can be connected. However, this requires maintaining a voltage difference of at least 1.7V between VCC and VOUT for proper gate drive.