AT24MAC402-XHM-B

Memory IC Overview

The AT24MAC402-XHM-B is a 2-Kbit (256 x 8) I²C-compatible serial EEPROM manufactured by Microchip Technology. It features factory-programmed, permanently locked EUI-48™ addresses and unique 128-bit serial numbers stored in a separate read-only memory area. The device operates on a supply voltage of 1.7V to 5.5V with clock frequencies up to 1 MHz. It includes hardware write protection via the WP pin and software write protection for the first half of the array. The component supports industrial temperatures from -40°C to +85°C and offers high reliability with 1,000,000 write cycles and 100-year data retention.

Memory IC Feature Summary

• Integrates factory-programmed, permanently locked EUI-48™ addresses and unique 128-bit serial numbers in a dedicated read-only memory block.
• Provides dual-layer write protection through a hardware Write-Protect (WP) pin for full array locking and reversible software write protection for the first half of the memory.
• Supports flexible I²C communication modes including Standard Mode (100 kHz), Fast Mode (400 kHz), and Fast Mode Plus (1 MHz).
• Features Schmitt triggers and filtered inputs for noise suppression, ensuring stable operation in electrically noisy environments.

Memory IC Applications

• Embedded systems requiring globally unique hardware identification for device authentication.
• Industrial control networks needing reliable non-volatile storage for configuration parameters alongside device identity.
• IoT devices utilizing factory-assigned MAC addresses to prevent address conflicts during manufacturing.
• Secure data logging applications where write protection prevents unauthorized modification of critical records.

Memory IC Procurement Notes

Verify that the specific ordering suffix matches the required package type, as the AT24MAC402 series is available in multiple form factors including SOIC, TSSOP, UDFN, and SOT23. Confirm the presence of the '-B' suffix indicates tube packaging if tube handling is required for your assembly process. Ensure the design accounts for the specific I²C addressing requirements associated with the A0, A1, and A2 pins to avoid bus collisions.

Memory IC Selection Notes

Select this component when a single device must provide both standard EEPROM storage and permanent hardware identity. It is suitable for designs requiring low power consumption and robust write protection mechanisms. Consider the AT24MAC602 variant if EUI-64 compatibility is necessary instead of EUI-48. Evaluate the available package options against board space constraints and thermal management requirements.

Memory IC Part Context

This part belongs to the AT24MAC series of serial EEPROMs designed by Microchip Technology. These devices are engineered to simplify system integration by combining memory functions with IEEE-compliant unique identifiers. The series targets applications demanding high reliability and secure device identification without the need for external identity components.

Memory IC Replacement Considerations

The AT24MAC602 serves as a functional alternative within the same family, offering EUI-64 support instead of EUI-48. Other AT24MAC or AT24CS series devices may be compatible if unique factory-programmed identifiers are not required. Verify pinout and electrical specifications before substituting with generic EEPROMs lacking integrated identity features.

Memory IC FAQ

Can the factory-programmed EUI-48 address be modified after purchase?

No, the EUI-48 address is permanently locked and stored in a separate read-only memory area. It cannot be altered by the user or through standard write operations.

What is the difference between hardware and software write protection in this device?

Hardware write protection is controlled by the state of the WP pin; connecting it to VCC inhibits all writes to the entire array. Software write protection can be enabled via commands to protect the first half of the array and can be either permanent or reversible depending on the command executed.

How does the device handle I²C bus addressing?

The device uses three hardware address pins (A0, A1, A2) to select one of eight possible base addresses. These pins determine the starting address for both the user data area and the read-only identifier area, allowing up to eight devices to share a single I²C bus.