AT94K05AL-25DQI

Overview

The AT94K05AL-25DQI is a monolithic Field Programmable System Level Integrated Circuit (FPSLIC) combining an Atmel AT40K SRAM-based FPGA with an embedded high-performance RISC AVR core. It features 5,000 usable FPGA gates, up to 36 Kbytes of dynamically allocated instruction and data SRAM, and JTAG ICE support for on-chip debugging. The device operates at 3.0V to 3.6V with a maximum clock frequency of 25 MHz, utilizing a 0.35µm CMOS process.

Feature Summary

• Integrated AT40K FPGA core with 5,000 gates and FreeRAM technology
• Embedded AVR 8-bit RISC microcontroller with hardware multiplier
• Up to 36 Kbytes of shared dual-port SRAM for program and data
• JTAG (IEEE 1149.1) interface for in-system programming and debugging

Applications

• Video compression and decompression systems
• Encryption and convolution algorithms
• Adaptive finite impulse response (FIR) filters
• Fast Fourier transforms (FFT) and discrete-cosine transforms (DCT)

Procurement Notes

Verify the specific ordering suffix DQI against the manufacturer's current package availability list. Confirm that the date code includes the 'J' indicator if JTAG ICE functionality is required for production units. Check export control classifications as this product may require additional documentation for international shipping.

Selection Notes

Select this component when a design requires both high-density programmable logic and a dedicated microcontroller on a single die. The AT94K05AL variant provides 5,000 gates, suitable for moderate complexity logic functions. Ensure the system voltage remains within the 3.0V to 3.6V range and that PCB layout supports split power supplies for optimal performance.

Part Context

This part belongs to the AT94KAL Series FPSLIC family, which integrates Atmel's AT40K FPGA architecture with AVR microcontroller technology. Other members in this series include the AT94K10AL and AT94K40AL, offering higher gate counts while maintaining the same architectural interface and pin compatibility for design migration.

Replacement Considerations

No direct public substitutes are listed. Alternative solutions would require separate FPGA and MCU components, necessitating significant redesign of the board layout and software architecture to replicate the integrated memory and interface capabilities.