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— IC芯片 | 连接器 | 传感器 | 被动器件 —
The AVR64DD28T-E/SO is an 8-bit microcontroller from the AVR DD family, utilizing the AVR CPU with a hardware multiplier. It features 64 KB of in-system self-programmable Flash memory, 8 KB of SRAM, and 256 bytes of EEPROM. The device operates at clock speeds up to 24 MHz and supports a supply voltage range of 1.8V to 5.5V. It includes a 12-bit differential ADC, a 10-bit DAC, three analog comparators, and multi-voltage I/O (MVIO). The component is housed in a 28-pin SOIC package and is rated for extended operating temperatures from -40°C to +125°C.
Verify that the ordering suffix 'T' corresponds to Tape & Reel packaging and 'E' indicates the Extended temperature range (-40°C to +125°C). Confirm the 'SO' suffix matches the required SOIC package style. Ensure compatibility with the specific voltage requirements of your application, as the device supports 1.8V to 5.5V. Cross-reference the datasheet DS40002315 for final pinout and electrical specifications before integration.
Select this part when vertical migration within the AVR DD family is required without code modification. It is suitable for designs needing high peripheral density in a 28-pin footprint. Consider the MVIO feature if interfacing with mixed-voltage sensors or actuators. The extended temperature rating makes it appropriate for harsh environments where standard industrial parts may fail.
This component belongs to the AVR DD Family, which offers full pin and feature compatibility across variants for easy vertical migration. The series integrates intelligent analog features and advanced digital peripherals like the Event System and CCL. It is designed for complex applications requiring multiple power domains and real-time control capabilities.
AVR64DD28-I/SO (Industrial temperature variant)
MVIO allows I/O pins on PORT C to operate at different voltage levels than the core supply, enabling direct bidirectional communication with devices in other power domains without external level shifters.
The Event System enables peripherals to communicate directly with each other without CPU intervention, reducing latency and freeing up processor cycles for other tasks.