AX8052F100-2-TW30

Overview

The AX8052F100-2-TW30 is an ultra-low power microcontroller based on the 8052 core, designed for radio applications. It features a 20 MHz clock speed, 64 kB of FLASH memory, and 8.25 kB of internal SRAM. The device includes three 16-bit general-purpose timers, two output compare units, two input capture units, two UARTs, a master/slave SPI controller, and a 10-bit ADC operating at 500 kSample/s. Additional peripherals include analog comparators, a temperature sensor, a DMA controller, an AES crypto engine, and a true random number generator. It operates within a supply voltage range of 1.8 V to 3.6 V and supports temperatures from -40°C to +85°C.

Feature Summary

• Ultra-low power consumption with multiple sleep modes including deep sleep and standby.
• Integrated dedicated Radio Master SPI interface compatible with AX RF chips.
• Hardware debug interface supporting breakpoints and single stepping via a 3-wire protocol.
• Built-in security features including AES encryption and programmable debug key protection.

Applications

• Wireless sensor networks
• Home automation systems
• Automatic meter reading
• Remote keyless entry systems

Procurement Notes

Verify that the TW30 suffix corresponds to the tape and reel packaging format containing 3,000 units per reel. Confirm the specific revision level matches project requirements. Ensure compatibility with the intended radio transceiver if utilizing the dedicated SPI interface. Validate power supply stability within the specified 1.8 V to 3.6 V range during operation.

Selection Notes

Select this component for battery-powered applications requiring low idle current and integrated wireless communication capabilities. The high-performance 8052 core allows efficient code execution. Consider the available GPIO pins and peripheral count against system interface needs. Evaluate the need for hardware debugging support during development phases.

Part Context

This part belongs to the AX8052F100 series of ultra-low power microcontrollers from ON Semiconductor. The series is optimized for integration with AXRadio ICs in sub-GHz ISM band applications. The TW30 variant specifically denotes the tape and reel packaging option, differing from the tray packaged TA05 variant.

Replacement Considerations

AX8052F100-2-TA05 is a verified substitute offering identical electrical specifications but packaged in trays instead of tape and reel.

FAQ

How does the dedicated Radio SPI interface differ from the standard SPI?

The dedicated Radio SPI controller is optimized for AX RF chips, allowing direct mapping of transceiver registers into the X address space for efficient CPU access without occupying standard GPIO pins.

What are the RAM retention options during Sleep mode?

Software can configure the two 4 kB RAM blocks in X-space to be individually retained or lost. A separate 256-byte RAM block is always retained during Sleep mode.