BD5336G-TR

Overview

The BD5336G-TR is a CMOS voltage detector IC from Rohm Semiconductor's BD53xx series, designed for simple reset and power-on reset applications. It features a detection threshold of 3.6V with ±1% precision. The device utilizes an adjustable delay timer controlled by an external capacitor and provides a low-active push-pull/totem pole output. Operating within a supply voltage range of 0.95V to 10V, it consumes ultra-low current (0.85µA typical). Packaged in a compact 5-SSOP (SC-74A) surface-mount format, it supports an industrial temperature range of -40°C to +105°C.

Feature Summary

• Adjustable reset delay time controlled by an external capacitor connected to the device.

Applications

• Microcontroller system reset circuits requiring specific timing delays.
• Logic circuit supervision for stable power-up sequences.
• Battery-powered devices requiring low standby current consumption.

Procurement Notes

Verify component authenticity through authorized distributors or direct manufacturer channels. Confirm RoHS3 compliance status and check for end-of-life notices, as this part may be restricted for new designs. Ensure the 5-SSOP package dimensions match your PCB footprint requirements before procurement.

Selection Notes

Select this component when a fixed 3.6V threshold with high accuracy is required alongside customizable reset timing. Compare against the BD5236G-1 if an open-drain output is preferred instead of the CMOS push-pull configuration. Consider the operating voltage range and thermal performance for your specific application environment.

Part Context

This part belongs to the BD53xx series of free delay time setting CMOS voltage detectors. It shares the SSOP5 package form factor with other series members but differs in output structure and internal circuitry compared to the BD52xx series which offers open-drain outputs.

Replacement Considerations

BD5236G-1: Similar pinout and detection voltage but features an N-channel open drain output instead of CMOS push-pull.

FAQ

How is the reset delay time determined?

The reset delay time is adjustable and determined by the value of an external capacitor connected to the device.

What is the active state of the reset output?

The reset output is active low, utilizing a push-pull/totem pole CMOS structure.