BQ4802YPWRG4

Overview

The BQ4802YPWRG4 is a parallel real-time clock (RTC) with CPU supervisor and external SRAM nonvolatile memory backup, manufactured by Texas Instruments. It operates at 5 V with a supply voltage range of 4.5 V to 5.5 V. The device integrates a time-of-day clock, century-based calendar, and watchdog timer in a 28-pin TSSOP package. It features less than 500 nA of clock operation current in backup mode and includes an on-chip battery-backup switchover circuit for nonvolatile control of external SRAM.

Feature Summary

• Parallel RTC interface with 16-byte clock/calendar registers
• On-chip battery-backup switchover circuit for external SRAM
• Microprocessor reset with push-button override capability
• Independent watchdog timer with programmable time-out period

Applications

• Telecommunications base stations
• Servers
• Handheld data collection equipment
• Medical equipment
• Test equipment

Procurement Notes

Verify the RoHS3 compliance status and confirm the specific manufacturing date code against the latest production data sheet revision. Ensure that the 28-TSSOP footprint matches the design requirements before finalizing procurement orders.

Selection Notes

Select this component when a 5-V parallel interface RTC with integrated CPU supervision is required. Verify that the system can accommodate the 28-pin TSSOP package dimensions and that the external SRAM interface timing meets the specified read/write cycle parameters.

Part Context

This part belongs to the BQ4802Y family, which also includes the 3.3-V BQ4802LY variant. The 'PW' suffix indicates the TSSOP package type, while the 'R' denotes tape-and-reel packaging. The 'G4' suffix signifies lead-free construction compliant with RoHS standards.

Replacement Considerations

The DS12R885S-5+T&R from Analog Devices Inc./Maxim Integrated is listed as a similar replacement option. Verify pin compatibility and electrical specifications before substitution.

FAQ

How does the BQ4802YPWRG4 handle external SRAM during power failure?

During a power failure, the CEOUT pin is forced inactive to unconditionally write-protect the external SRAM. The VOUT pin switches to the backup cell to maintain SRAM data.

What is the default watchdog time-out period?

The default watchdog time-out period is 1.5 seconds when no valid battery power is present or if the watchdog bits are not programmed.

Can the RTC continue counting time during battery backup?

Yes, the RTC continues to count time in battery-backup mode provided a valid 3-V backup source is connected to the BC pin and the STOP bit is set to 1.