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The C8051F335-GMR is a mixed-signal ISP Flash microcontroller from Silicon Labs, part of the C8051F33x family. It features an 8051-compatible core operating at up to 25 MHz with 25 MIPS throughput. The device includes 2 kB of in-system programmable Flash memory and 768 bytes of internal data RAM. Key peripherals include four 16-bit counter/timers, a Programmable Counter Array (PCA), and serial interfaces such as UART, SMBus, and SPI. It operates within a supply voltage range of 2.7 V to 3.6 V and supports temperatures from -40 °C to +85 °C.
Verify component authenticity through authorized channels. Confirm package integrity and pin alignment against the QFN-20 specification. Ensure compatibility with existing firmware architectures due to the specific memory configuration. Check for end-of-life status or obsolescence notices prior to final design approval.
Select this model when 2 kB of Flash memory suffices for application code. Suitable for designs requiring 17 I/O pins with 5 V tolerance. Consider alternative variants if higher ADC resolution or larger memory capacity is required. Verify that the 25 MHz clock speed meets real-time processing requirements.
This component belongs to the C8051F33x series of mixed-signal microcontrollers. It shares the same core architecture and peripheral suite as other members like the C8051F330 and C8051F331, differing primarily in Flash memory size. The series is designed for cost-sensitive, high-performance embedded applications.
Direct substitutes within the same family include C8051F330, C8051F331, C8051F332, C8051F333, and C8051F334. Note that these variants have different Flash capacities (8 kB or 4 kB) but maintain pin compatibility and functional equivalence.
No, the C8051F335 variant does not include the 10-bit ADC found in the C8051F330/2/4 models. It focuses on digital I/O and standard peripherals.
The CIP-51 microcontroller core operates at a maximum frequency of 25 MHz, delivering up to 25 MIPS throughput.