CD74AC112E

CD74AC112E

$0.49
  • Description:IC FF JK TYPE DUAL 1BIT 16DIP
  • Series:74AC
  • Mfr:Harris Corporation
  • Package:Tube

SKU:2b79ceb86e19 Category: Brand:

  
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Product Detailed Parameters

  • Description:IC FF JK TYPE DUAL 1BIT 16DIP
  • Series:74AC
  • Mfr:Harris Corporation
  • Package:Tube
  • Function:Set(Preset) and Reset
  • Type:JK Type
  • Output Type:Complementary
  • Number of Elements:2
  • Number of Bits per Element:1
  • Clock Frequency:100 MHz
  • Max Propagation Delay @ V, Max CL:10.3ns @ 5V, 50pF
  • Trigger Type:Negative Edge
  • Current - Output High, Low:24mA, 24mA
  • Voltage - Supply:1.5V ~ 5.5V
  • Current - Quiescent (Iq):4 µA
  • Operating Temperature:-55°C ~ 125°C (TA)
  • Mounting Type:Through Hole
  • Supplier Device Package:16-PDIP
  • Package / Case:16-DIP (0.300", 7.62mm)
  • Input Capacitance:10 pF
  • Grade:-
  • Qualification:-

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CD74AC112E

Overview

The CD74AC112E is a dual J-K negative edge-triggered flip-flop manufactured by Texas Instruments, part of the AC logic series. It features differential outputs and accepts CMOS or LVTTL inputs. The device operates within a supply voltage range of 1.5 V to 5.5 V and exhibits a propagation delay of 129 ns. It provides high-level output current of -24 mA and low-level output current of 24 mA. Packaged in a 16-pin PDIP for through-hole mounting, it functions reliably across an industrial temperature range from -55 °C to +125 °C.

Feature Summary

  • Dual independent J-K flip-flops with negative-edge triggering
  • Differential output configuration for signal integrity
  • Compatible with both CMOS and LVTTL input logic levels

Applications

  • Digital data storage and register circuits
  • Frequency division and counter applications
  • State machine implementation in control systems

Procurement Notes

Verify the manufacturer designation on the component marking, as the datasheet indicates Texas Instruments while distributor listings may reference Harris Corporation. Confirm the specific package variant matches the required PCB footprint. Ensure the operating environment stays within the specified -55 °C to +125 °C temperature limits for reliable performance.

Selection Notes

Select this component when dual J-K functionality with negative-edge triggering is required in a CMOS process. The wide supply voltage range supports various logic families. Consider the PDIP-16 package constraints for board space. Verify that the 129 ns propagation delay meets the system timing requirements for the intended application frequency.

Part Context

This device belongs to the CD74AC112 family of dual J-K flip-flops. It utilizes advanced CMOS technology to provide high-speed operation with low power consumption. The AC series offers improved speed-power product compared to older standard logic families, making it suitable for modern digital designs requiring efficient state management.

Replacement Considerations

Public confirmed substitute part numbers are not available in the provided documentation.

CD74AC112ECD74AC112E
$0.49
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