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CS5532-ASZR is listed in the Analog To Digital Converters (ADC) range at ChipApex. The manufacturer field lists Cirrus Logic Inc.. Its product description is IC ADC 24BIT SIGMA-DELTA 20SSOP. Review the specifications below when checking this part for your BOM.
The CS5532-ASZR is a two-channel, 24-bit delta-sigma analog-to-digital converter (ADC) from Cirrus Logic. It integrates a chopper-stabilized programmable gain instrumentation amplifier (PGIA) with gains selectable from 1x to 64x and an input noise density of 12 nV/√Hz at 0.1 Hz. The device features a four-order modulator and a digital filter providing twenty selectable output word rates ranging from 6.25 to 3,840 Sps. It utilizes a three-wire serial interface compatible with SPI and Microwire standards. The ADC supports scalable input spans via calibration and includes per-channel read/write calibration registers for offset and gain adjustments.
Verify the ASZR suffix indicates tape-and-reel packaging when sourcing components. Confirm RoHS compliance status as manufacturing processes may evolve. Check for obsolescence notices or product change notifications regarding the CS5532-AS family before finalizing procurement plans.
Select the CS5532-ASZR for applications requiring two differential channels with high precision. Ensure the system clock frequency matches the required output word rate, typically 4.9152 MHz. Verify that the power supply configuration aligns with the specific analog and digital voltage requirements defined in the datasheet specifications.
The CS5532-ASZR belongs to the CS5531/32/33/34-AS family of highly integrated ADCs. While the CS5531 and CS5533 offer 16-bit resolution, the CS5532 and CS5534 provide 24-bit performance. This family shares common architectural features such as charge-balance techniques and chopper-stabilized amplifiers, differing primarily in channel count and resolution.
Direct pin-compatible replacements within the same package are limited due to the end-of-life status of the -ASZ variant. Evaluate the CS5534-ASZR if four channels are acceptable, or consider newer generation ADCs from Cirrus Logic that maintain similar interface protocols and performance metrics.
At a gain of 64x, the input noise density is 12 nV/√Hz at 0.1 Hz, with no 1/f noise present.
The device provides twenty selectable output word rates ranging from 6.25 Sps to 3,840 Sps when using a 4.9152 MHz master clock.
Yes, the simple three-wire serial interface is compatible with both SPI and Microwire standards and includes a Schmitt trigger on the serial clock input.
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