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The DMG963010R is a dual digital transistor in an SSMini5-F4-B package, containing one NPN (Tr1) and one PNP (Tr2) epitaxial planar silicon transistor. It features built-in bias resistors with typical values of 10 kΩ for both R1 and R2. The device supports a collector-emitter voltage (VCEO) of 50 V for the NPN and -50 V for the PNP, with a continuous collector current of 100 mA. Key electrical characteristics include a low collector-emitter saturation voltage (VCE(sat)) of 0.25 V at IC = 10 mA. Total power dissipation is rated at 125 mW, with an operating ambient temperature range of -40°C to +85°C.
Verify the specific ordering suffix '0R' against the manufacturer's latest documentation to confirm packaging details, such as reel quantity or tape specifications. Ensure compliance with RoHS and halogen-free requirements if mandated by the target application standards. Confirm availability status directly with authorized distributors, as product lifecycles may change without prior notice.
Select this component when a complementary pair of digital transistors is required for logic interface or switching applications. The 10 kΩ internal resistor value is suitable for standard TTL and CMOS logic levels. Verify that the 125 mW total power dissipation rating accommodates the thermal constraints of the final assembly environment.
This part belongs to the Panasonic DMG series of digital transistors, which are designed for general-purpose switching in consumer and industrial electronics. The DMG96301 variant specifically combines NPN and PNP structures, offering a space-saving alternative to discrete transistor pairs. It utilizes the SSMini5 package format defined by JEITA SC-107BB.
The datasheet identifies DRC2114E (NPN) and DRA2114E (PNP) as the basic constituent parts for the collector-base connection configuration. Designers requiring separate components may substitute these individual transistors, though this will increase board space and assembly complexity compared to the integrated DMG963010R solution.