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The DS1013-100 is a silicon delay line containing three independent, monolithic, logic-buffered delay lines. It provides delays ranging from 10ns to 200ns with nominal accuracy of ±2ns for 10ns to 60ns delays, ±3% for 70ns to 100ns delays, and ±5% for 150ns to 200ns delays. The device operates on a single 5V supply (4.75V to 5.25V) and features true outputs capable of driving up to ten standard 74LS loads. It is housed in an 8-pin PDIP package.
Verify the specific suffix designation to confirm the exact delay value and operating temperature range, as the base part number covers multiple variants. Confirm RoHS compliance status if required by the target assembly process. Check current availability as older CMOS components may have limited stock or end-of-life status depending on the distributor.
Select this component when precise fixed delays are required without the complexity of programmable timers. Ensure the load capacitance does not exceed the drive capability of ten standard 74LS loads. Verify that the required delay falls within the specified accuracy ranges for the chosen tap setting. Consider the PDIP package size for PCB layout constraints.
This device belongs to the Maxim Integrated 1013 series of silicon delay lines. It serves as a compact alternative to discrete RC networks or hybrid delay modules. The series is designed for applications requiring stable, temperature-compensated delays in digital logic environments.
Direct pin-to-pin replacements may include other parts from the DS1013 family with different delay values. Verify electrical compatibility before substituting with generic delay line ICs.