DS1086LU-B66+T

Overview

The DS1086LU-B66+T is a 3.3V programmable clock generator from the DS1086L family, housed in an 8-pin µSOP package. It generates spread-spectrum square-wave outputs ranging from 130kHz to 66.6MHz. The device features selectable dither magnitudes of 0.5%, 1%, 2%, 4%, or 8% to reduce radiated emissions. It operates on a 2.7V to 3.6V supply and includes nonvolatile EEPROM memory for standalone configuration. Key electrical parameters include a master oscillator frequency range of 33.3MHz to 66.6MHz, a default factory frequency of 48.65MHz with ±0.5% tolerance at 25°C, and a 5kHz DAC step size.

Feature Summary

• Programmable output frequencies from 130kHz to 66.6MHz using internal master oscillator and prescaler.
• Selectable spread-spectrum dither (0.5% to 8%) enabled via SPRD pin or 2-Wire interface.
• Nonvolatile EEPROM storage retains settings without external power.
• Glitchless output-enable control and dedicated power-down mode for low standby current.

Applications

• Printers
• Copiers
• PCs
• Computer Peripherals
• Cell Phones

Procurement Notes

Verify the specific suffix 'B66' against official documentation, as standard listings typically use 'LU'. Confirm lead-free status (+) and temperature range (-40°C to +85°C). Check for obsolescence or limited availability status directly with the manufacturer or authorized distributors.

Selection Notes

Select this component when EMI reduction via spread-spectrum clocking is required for 3.3V logic systems. Ensure the target frequency falls within the 130kHz to 66.6MHz range. Verify that the 2-Wire serial interface is compatible with the host controller's I/O capabilities. Consider the industrial temperature range if operating outside commercial limits.

Part Context

The DS1086L series replaces discrete crystal oscillators and resonators with a silicon-based solution. The 'LU' designation indicates the -40°C to +85°C industrial temperature range and µSOP package. The '+' suffix denotes RoHS compliance and lead-free construction. This part integrates the oscillator, PLL, and output buffer into a single chip.

Replacement Considerations

Direct replacements must match the 8-pin µSOP footprint and 3.3V operation. Cross-reference with other DS1086 variants (e.g., DS1086Z) only if voltage levels and temperature ranges are compatible. Verify pinout compatibility, specifically SDA/SCL and OE/PDN functions, before substitution.

FAQ

How is the dither magnitude selected?

The dither magnitude (0.5%, 1%, 2%, 4%, or 8%) is selected by programming the JS2, JS1, and JS0 bits in the PRESCALER register via the 2-Wire interface. The SPRD pin must also be held high to enable the dither function.

What is the purpose of the RANGE register?

The RANGE register is a read-only register that stores the factory-programmed default offset value (OS). This value is required to calculate new OFFSET settings relative to the factory trim, ensuring accurate frequency programming across different devices.

How does the device handle power-down?

Driving the PDN pin low disables the master oscillator and enters power-down mode, reducing supply current to approximately 10µA. The output goes to a high-impedance state after 100µs. Exiting power-down requires 200µs for the output to stabilize.