Complex Programmable Logic Devices EPM9560RC240-15YY product image

EPM9560RC240-15YY

  • Description:IC CPLD 560MC 15NS 240RQFP
  • Series:MAX® 9000

SKU:28c546e6fbdb Category: Brand:

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EPM9560RC240-15YY is listed in the Complex Programmable Logic Devices range at ChipApex. The manufacturer field lists Altera. Its product description is IC CPLD 560MC 15NS 240RQFP. Review the specifications below when checking this part for your BOM.

Complex Programmable Logic Devices specifications for EPM9560RC240-15YY

  • Description:IC CPLD 560MC 15NS 240RQFP
  • Series:MAX® 9000
  • Mfr:Altera
  • Package:Tray
  • Programmable Type:In System Programmable
  • Delay Time tpd(1) Max:15 ns
  • Voltage Supply - Internal:4.75V ~ 5.25V
  • Number of Macrocells:560
  • Number of I/O:191
  • Operating Temperature:0°C ~ 70°C (TA)
  • Mounting Type:Surface Mount
  • Package / Case:240-BFQFP Exposed Pad
  • Supplier Device Package:240-RQFP (32x32)
  • Number of Gates:12000
  • Number of Logic Elements/Blocks:35

Complex Programmable Logic Devices datasheet and documents for EPM9560RC240-15YY

EPM9560RC240-15YY

Complex Programmable Logic Devices Overview

The Altera EPM9560RC240-15YY is a Complex Programmable Logic Device (CPLD) belonging to the MAX 9000 family. It features 560 macrocells, 35 Logic Array Blocks (LABs), and up to 216 user I/O pins in a 240-pin RQFP package. The device operates at a maximum frequency of 118 MHz with a typical pin-to-pin propagation delay of 15 ns. It utilizes CMOS EEPROM technology for non-volatile storage and supports 5.0-V In-System Programmability (ISP) via an IEEE 1149.1 JTAG interface.

Complex Programmable Logic Devices Feature Summary

  • High-performance CMOS EEPROM-based architecture with 10–15 ns delays
  • Dual-output macrocells allowing independent combinatorial and registered logic
  • MultiVolt I/O interface supporting 3.3-V and 5.0-V mixed-voltage systems
  • Built-in JTAG boundary-scan test circuitry compliant with IEEE Std. 1149.1

Complex Programmable Logic Devices Applications

  • PCI Local Bus implementations compliant with Revision 2.2
  • High-speed state machines and control logic
  • Mixed-voltage system interfacing
  • In-system programmable design iterations

Complex Programmable Logic Devices Procurement Notes

Verify the specific ordering suffix 'YY' against official documentation, as standard datasheets typically list '-15' or '-15F'. Confirm RoHS compliance status, as older MAX 9000 variants may not meet current environmental standards. Ensure the 240-pin RQFP package matches the target PCB footprint.

Complex Programmable Logic Devices Selection Notes

Select this model for designs requiring high-density logic with predictable interconnect delays via FastTrack routing. The -15 speed grade offers a balance between performance and power. Consider the EPM9560A variant if lower power consumption is required, or the -10 grade for stricter timing constraints.

Complex Programmable Logic Devices Part Context

This component is part of the third-generation MAX architecture, designed to replace complex discrete logic and PAL/GAL devices. It bridges the gap between simple PLDs and FPGAs, offering reprogrammability with deterministic timing suitable for system-level integration.

Complex Programmable Logic Devices Replacement Considerations

The EPM9560A series serves as a low-power alternative within the same family. For direct functional replacement, verify pin compatibility and timing requirements against the EPM9560-10 or EPM9560-20 speed grades.

EPM9560RC240-15YYEPM9560RC240-15YY

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