FIN3383MTDX

Overview

The onsemi FIN3383MTDX is a low-voltage serializer designed to transform 28-bit wide parallel LVTTL data into four serial LVDS data streams. It supports shift clock frequencies from 20MHz to 66MHz, enabling a maximum throughput of 1.76Gbps. The device operates within a supply voltage range of 3.0V to 3.6V and an operating temperature range of -10°C to +70°C. It features an internal PLL requiring no external components, complies with the TIA/EIA-644 specification, and utilizes a 56-lead TSSOP package.

Feature Summary

• Converts 28-bit parallel LVTTL inputs into four serial LVDS differential outputs
• Integrates an internal phase-locked loop (PLL) eliminating the need for external components
• Supports flexible rising or falling edge data strobing via the R_FB pin
• Includes a dedicated power-down input (/PwrDn) to place outputs in a high-impedance state

Applications

• Flat panel display link interfaces
• High-speed TTL-to-LVDS conversion systems
• Embedded display applications requiring EMI reduction

Procurement Notes

Verify that the specific orderable part number matches the required operating temperature range (-10°C to +70°C). Confirm the package type is the 56-lead Thin Shrink Small Outline Package (TSSOP) with a width of 6.1mm. Ensure compatibility with the intended system's supply voltage requirements of 3.0V to 3.6V before procurement.

Selection Notes

Select this component when a serializer function is required for 28-bit data paths at speeds up to 66MHz. It serves as the transmitter counterpart to the FIN3386 receiver. Designers must account for the 2-bit cycle delay between the MSB output and the transmit clock. Verify that the application environment stays within the specified commercial temperature limits.

Part Context

This device belongs to the FIN338x family of Low-Voltage 28-Bit Flat Panel Display Link Serializer/Deserializer chips. It functions specifically as the transmitter unit, complementing receivers like the FIN3386. The series addresses electromagnetic interference and cable size issues associated with wide, high-speed TTL interfaces by utilizing LVDS signaling technology.

Replacement Considerations

The FIN3385MTDX is a direct functional substitute offering support for higher clock frequencies up to 85MHz while maintaining the same 28:4 serialization architecture and package configuration.

FAQ

What is the maximum supported clock frequency for the FIN3383?

The FIN3383 supports a maximum shift clock frequency of 66MHz.

How does the device handle power-down states?

Asserting the /PwrDn pin LOW places all outputs in a high-impedance state, reducing power consumption.

Is an external crystal required for operation?

No, the device includes an internal PLL that requires no external components for clock generation.