GAL20V8B-15LP

Programmable Logic Device Pld Overview

The GAL20V8B-15LP is a discontinued high-performance E2CMOS PLD from Lattice Semiconductor. It features an industrial temperature range of -40°C to +85°C and operates at a supply voltage of +4.50V to +5.50V. The device provides a maximum propagation delay of 15 ns, with a typical operating power supply current of 75 mA. It utilizes Electrically Erasable floating gate technology for reprogrammability and includes eight output logic macrocells (OLMCs) capable of complex logic emulation.

Programmable Logic Device Pld Feature Summary

• High Performance E2CMOS Technology: Supports up to 166 MHz Fmax with 5 ns minimum propagation delay in faster variants.
• E2 Cell Technology: Allows high-speed electrical erasure in under 100ms with over 20 years data retention.
• Flexible OLMC Architecture: Configurable as simple, complex, or registered modes to emulate various PAL devices.
• Active Pull-ups: All pins feature active pull-up resistors.

Programmable Logic Device Pld Applications

• DMA Control
• State Machine Control
• High Speed Graphics Processing
• Standard Logic Speed Upgrade

Programmable Logic Device Pld Procurement Notes

This component has been officially discontinued by Lattice Semiconductor per Product Change Notification PCN#13-10. Verification of availability requires checking secondary market distributors or legacy inventory holders such as Rochester Electronics. No new production units are manufactured.

Programmable Logic Device Pld Selection Notes

Select the GAL20V8B-15LP only for maintenance of existing designs requiring specific 15 ns timing within the industrial temperature grade. Ensure design software supports the GAL20V8 device type for proper compilation of registered, complex, or simple macrocell configurations.

Programmable Logic Device Pld Part Context

The GAL20V8B series represents the industrial grade variant of the GAL20V8 family, distinguished by its extended temperature rating compared to commercial versions. This part number specifically denotes the low-power consumption option within the 15 ns speed bin.

Programmable Logic Device Pld Replacement Considerations

Lattice issued PCN#13-10 indicating discontinuation. Designers should consult the datasheet's reference table for alternative ordering part numbers or contact authorized legacy support providers for available inventory.

Programmable Logic Device Pld FAQ

What is the maximum clock frequency for the GAL20V8B-15LP?

The maximum clock frequency with no feedback is 45.5 MHz. With internal feedback, it is 62.5 MHz, and with external feedback, it is 58.8 MHz.

How many product terms are available per output in Registered mode?

In Registered mode, registered outputs have eight product terms per output, while I/O configurations have seven product terms per output.

Can Pins 1 and 13 be used as dedicated inputs?

No. In Registered mode, Pin 1 and Pin 13 are permanently configured as Clock and Output Enable, respectively, and cannot be used as dedicated inputs.