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GAL22V10D-10LJN is listed in the Programmable Logic Device Pld range at ChipApex. The manufacturer field lists Lattice Semiconductor Corporation. Its product description is IC PLD 10MC 10NS 28PLCC. Review the specifications below when checking this part for your BOM.
The GAL22V10D-10LJN is a discontinued Simple Programmable Logic Device (SPLD) from Lattice Semiconductor, utilizing E2CMOS technology. It features 10 macrocells, 22 I/O pins, and a maximum propagation delay of 10 ns. The device operates on a 5V supply with a typical current of 90 mA. It supports both registered and combinatorial modes via configurable Output Logic Macrocells (OLMCs). Key specifications include active pull-ups on all pins, asynchronous reset, synchronous preset, and an electronic signature for identification. The component is housed in a 28-pin PLCC package.
All devices in the GAL22V10 family have been officially discontinued per Product Change Notifications (PCNs), including PCN#13-10 which references the GAL22V10D-10LJN. Verification of availability requires checking secondary market distributors or Rochester Electronics for remaining inventory, as original manufacturer production has ceased.
Select this component only if legacy compatibility with standard bipolar or UVCMOS 22V10 fuse maps is required. The GAL22V10D-10LJN offers a 10 ns speed grade in a PLCC-28 package. Designers should account for the 5V operating voltage and verify that the 90 mA typical supply current fits the system power budget.
The GAL22V10 series represents Lattice's high-performance E2CMOS Generic Array Logic devices. The 'D' suffix denotes the specific device variant within the GAL22V10 family. The '10' indicates the 10 ns speed grade, 'LJ' specifies the Lead-Free PLCC-28 package, and 'N' typically denotes lead-free packaging compliance in Lattice's ordering nomenclature.
No direct functional replacements are listed in the provided datasheet due to the discontinuation of the entire product line. Users seeking modern equivalents must evaluate Lattice's ispGAL22LV10 family or other SPLD/CPLD solutions, noting differences in voltage levels (3.3V vs 5V) and pinouts.
The maximum propagation delay (tpd) for the GAL22V10D-10LJN is 10 ns under commercial grade conditions.
The device features active pull-ups on all pins, causing floating inputs to default to a TTL high (logic 1). However, Lattice recommends connecting unused inputs to Vcc, ground, or an adjacent active input to improve noise immunity.
Yes, the device uses E2CMOS technology which allows for electrical erasure and reprogramming. It supports over 100 erase/write cycles with a high-speed electrical erase time of less than 100 ms.
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