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GAL26CV12B-20LJI is listed in the Programmable Logic Device Pld range at ChipApex. The manufacturer field lists Lattice Semiconductor Corporation. Its product description is IC PLD 12MC 20NS 28PLCC. Review the specifications below when checking this part for your BOM.
The GAL26CV12B-20LJI is a Simple Programmable Logic Device (SPLD) from the GAL®26CV12 family, manufactured by Lattice Semiconductor Corporation. It utilizes high-performance E2CMOS technology and features an EE PLD architecture with a PAL-type structure. The device provides 26 input lines, 13 dedicated inputs, and 12 I/O lines within a 28-pin DIP package. Key electrical specifications include a maximum propagation delay of 20 ns and a maximum clock frequency of 50 MHz. It supports register preload and power-up reset functions.
This component is officially discontinued by Lattice Semiconductor. Product Change Notifications (PCNs), specifically PCN#06-07 and PCN#13-10, confirm the end-of-life status for all devices in the GAL26CV12 datasheet. Verification of current availability requires checking secondary market distributors, as original manufacturer stock is no longer produced.
Select this part for legacy designs requiring a 26-input, 12-output SPLD with registered outputs. The 20 ns speed grade suits applications with moderate timing requirements up to 50 MHz. Ensure compatibility with the 28-pin DIP footprint. For new designs, consider modern CPLD alternatives due to the discontinued status of this specific part number.
The GAL26CV12 series belongs to Lattice's Generic Array Logic (GAL) family, designed to replace complex bipolar PALs with lower power CMOS equivalents. This specific model represents a high-density variant within the GAL line, offering 12 macrocells. The 'LJI' suffix indicates a specific industrial temperature range and lead-free compliant packaging option available at the time of production.
As the GAL26CV12B-20LJI is discontinued, direct pin-to-pin replacements are not guaranteed. Review Lattice's product change notifications for any final recommended substitutes. Modern FPGA or CPLD families may require schematic modifications due to differences in logic architecture and I/O configurations.
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