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GD25D20ETIGR is listed in the Memory IC range at ChipApex. The manufacturer field lists GigaDevice Semiconductor (HK) Limited. Its product description is IC FLASH 2MBIT SPI/DUAL 8SOP. Review the specifications below when checking this part for your BOM.
The GD25D20ETIGR is a 2 Mbit Serial NOR Flash memory device manufactured by GigaDevice. It supports Standard SPI and Dual Output interfaces, enabling data transfer speeds up to 160 Mbits/s in dual mode. The device operates on a single power supply voltage ranging from 2.7 V to 3.6 V. It features a uniform sector architecture with 4 KByte sectors and 32/64 KByte blocks. Key electrical characteristics include a maximum clock frequency of 104 MHz for fast read operations and a typical standby current of 0.1 μA.
Verify the specific package variant (SOP8 or USON8) required for your design, as the base part number covers multiple packages. Confirm that the ordering suffix matches the desired tape and reel quantity. Ensure voltage levels align with the 2.7V to 3.6V operating range. Check for moisture sensitivity handling requirements during assembly.
Select this component when a small footprint and low power consumption are critical. The Dual Output mode offers higher throughput than standard SPI without requiring additional pins. Consider the uniform sector size for easy erasure management. Verify that the 2 Mbit capacity meets your application's code and data storage needs.
This part belongs to the GD25D series of Serial NOR Flash memories. It shares architectural similarities with the GD25D40E but offers half the density. The series is designed for cost-sensitive applications requiring reliable code execution and data retention. It complements GigaDevice's broader portfolio of SPI NOR and NAND flash solutions.
GD25D20CEIGR
Standard SPI uses four signals (SCLK, CS#, SI, SO) for data transfer. Dual Output mode utilizes two bidirectional I/O pins (IO0 and IO1) to transfer data at twice the rate, achieving up to 160 Mbits/s.
Write protection is achieved through software commands setting Block Protect (BP) bits in the Status Register, and/or hardware protection via the WP# pin. The SRP bit determines whether the Status Register itself is protected.
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