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GD25LE80ETIGR is listed in the Memory IC range at ChipApex. The manufacturer field lists GigaDevice Semiconductor (HK) Limited. Its product description is IC FLASH 8MBIT SPI/QUAD 8SOP. Review the specifications below when checking this part for your BOM.
The GD25LE80ETIGR is an 8M-bit (1M x 8) SPI NOR flash memory manufactured by GigaDevice. It supports Standard, Dual, and Quad SPI interfaces with a maximum clock frequency of 133 MHz. The device operates on a single power supply voltage ranging from 1.65V to 2.0V. Key performance metrics include a typical page program time of 0.4ms, sector erase time of 40ms, and block erase times of 0.15s or 0.2s. It features uniform 4K-byte sectors and 32/64K-byte blocks, with 256-byte programmable pages.
Verify the specific package variant (SOP8, USON8, or WLCSP) matches your PCB footprint requirements. Confirm that the 1.65V-2.0V operating voltage range aligns with your system's power rails. Ensure the Quad Enable (QE) bit configuration in the status register is correctly handled if utilizing Quad SPI or QPI modes. Check for RoHS compliance documentation if required for your manufacturing process.
Select this component when a low-voltage (1.65V-2.0V) operation is mandatory. Choose over higher voltage variants if power efficiency is critical. Consider the SOP8, USON8, or WLCSP packages based on available board space. Ensure the design accommodates the specific command set for Quad Enable and Block Protection bits if advanced security or speed features are utilized.
The GD25LE80E series belongs to GigaDevice's family of uniform sector serial flash memories. It is designed for applications requiring small form factors and low power consumption. The 'E' suffix typically denotes the extended voltage range or specific process node variations within the GD25Q/L series. It complements other densities in the portfolio, offering a balance between capacity, speed, and power efficiency for embedded storage needs.
GD25LE80ETIGY: Same manufacturer, different package option.
When the QE bit is set to 1, the HOLD# and WP# pins function as bidirectional I/O pins (IO3 and IO2) for Quad SPI operations, disabling their dedicated hold and write-protect functions.
Upon power-up, the device defaults to Standard/Dual/Quad SPI mode. QPI mode must be explicitly enabled using the Enable QPI (38H) command.
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