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ICL7117CPL+ is listed in the ADCs/DACs - Special Purpose range at ChipApex. The manufacturer field lists Analog Devices Inc./Maxim Integrated. Its product description is IC DISPLAY DRIVR 3.5DIGIT 40DIP. Review the specifications below when checking this part for your BOM.
The ICL7117CPL+ is a 3½ digit monolithic analog-to-digital converter (ADC) manufactured by Analog Devices Inc./Maxim Integrated. It features dual-slope integration with on-board LED display drive capability, eliminating the need for external circuitry. The device includes a dedicated Hold pin to freeze readings and utilizes high-impedance CMOS differential inputs. Key electrical specifications include a maximum rollover error of ±1 count, zero reading drift under 1µV/ºC, and input leakage current below 10pA at +25°C. It operates within a temperature range of 0ºC to +70ºC.
Verify that the component matches the PDIP-40 package configuration. Confirm the suffix '+' indicates lead-free/RoHS compliance as per the manufacturer's ordering information. Ensure the operating environment remains within the specified commercial temperature range of 0ºC to +70ºC.
Select the ICL7117CPL+ when direct LED display driving is required, distinguishing it from the ICL7116 which targets LCDs. The inclusion of the Hold pin makes this model suitable for applications requiring stable readouts during fluctuating input conditions. Verify supply voltage requirements (+6V to V+, -9V to GND) against system power constraints.
This component belongs to the Maxim ICL7116/ICL7117 family of 3½ digit ADCs. It serves as an evolution of the ICL7106/ICL7107 series, adding a Hold pin to prevent display updates. The 'C' designation indicates a commercial temperature rating, while 'PL' specifies the Plastic Dual In-line Package.
The ICL7116 is the functional equivalent for LCD applications but lacks LED drive capability. The ICL7107 is a compatible predecessor but does not feature the Hold pin. Cross-model substitution requires verifying the presence of the HOLD pin functionality in the target application design.
Connecting the HOLD pin to V+ inhibits the display latch pulse, freezing the current reading. Leaving the pin open pulls it low via an internal resistor, allowing continuous display updates after each conversion cycle.
The absolute maximum analog input voltage is defined by the supply rails (V+ to V-). Input voltages may exceed the supply voltages provided the input current is limited to 100µA.
No, the ICL7117 contains on-chip clock generation circuitry. External components connected to OSC1, OSC2, and OSC3 pins set the clock frequency, typically resulting in a 48kHz conversion rate.
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