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The INA2134UA/2K5G4 is a dual-channel differential line receiver manufactured by Texas Instruments. It integrates two precision amplifiers with on-board laser-trimmed resistors to provide a fixed unity gain of 1 V/V (0 dB). The device operates within a wide supply voltage range of 8 V to 36 V and supports single or dual power configurations. Key electrical specifications include a maximum total harmonic distortion plus noise of 0.0005% at 1 kHz, a slew rate of 14 V/µs, and a minimum common-mode rejection ratio of 90 dB. It is housed in an 8-pin SOIC package.
Verify the specific suffix 'G4' against the manufacturer's current datasheet to confirm compliance details and exact ordering information. Ensure the selected packaging format matches the required quantity needs, as reel options may differ from tube quantities. Confirm that the 8-pin SOIC footprint aligns with the target PCB layout constraints before finalizing procurement.
Select this component when designing circuits requiring precise differential signal reception with minimal external resistor count. The integrated laser-trimmed resistors simplify design complexity while maintaining high accuracy across temperature variations. Consider the 14 V/µs slew rate and 90 dB CMRR requirements to ensure adequate dynamic response and noise immunity for sensitive audio interfaces.
This part belongs to the INA134 family of audio differential line receivers. While the standard INA134 is a single-channel device in an 8-pin package, the INA2134 variant provides dual channels within the same physical footprint. This integration allows designers to implement multiple isolated receiver stages without increasing board space, making it suitable for compact multi-channel audio equipment.
The INA134UA serves as the single-channel equivalent within the same product family. For direct functional substitution in dual-channel designs, verify compatibility with other dual-channel variants such as the INA2134UAE4. Cross-reference pinouts and thermal characteristics to ensure seamless integration into existing hardware architectures.