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The ISD4002-240SYI is a single-chip voice record and playback IC from the ISD4002 ChipCorder series by Nuvoton Technology Corporation. It provides 240 seconds of recording duration at a sampling frequency of 4.0 kHz with a typical filter passband of 1.7 kHz. The device operates on a single 3-volt supply (2.7 V to 3.3 V) and features an internal oscillator or external clock input via the XCLK pin, which requires a 512 kHz clock for this specific model. It utilizes a four-wire SPI interface for control and includes AutoMute functionality for noise attenuation. The component is housed in a 28-pin SOIC package and supports commercial operating temperatures from 0°C to +70°C.
Verify the industrial temperature grade suffix 'I' corresponds to the -40°C to +85°C range specified in the datasheet. Confirm the 'SY' suffix indicates the 28-SOIC package type. Check current availability status as older ISD4002 variants may have end-of-life notifications. Ensure the external clock source matches the required 512 kHz specification if using the XCLK pin instead of the internal oscillator.
Select this model specifically for applications requiring approximately four minutes of audio time. Note that the lower 4.0 kHz sampling rate results in a narrower 1.7 kHz filter passband compared to higher-speed variants. Use this part when long duration is prioritized over high-fidelity voice reproduction. Ensure the microcontroller supports the required SPI protocol and can handle the 15 mA playback and 25 mA record currents.
This component belongs to the ISD4002 ChipCorder series, which offers durations ranging from 120 to 240 seconds. The ISD4002-240 variant represents the longest recording capacity within this family, achieved by reducing the sampling rate to 4.0 kHz. It shares the same core architecture, including the multilevel Flash memory array and AutoMute technology, with other models like the ISD4002-120 and ISD4002-180.
ISD4002-180SYI: Offers 180 seconds duration at 5.3 kHz sampling rate.
If using the XCLK pin for greater precision, a 512 kHz clock signal is required.
It attenuates background noise by 6 dB during periods of silence by comparing signal amplitude to an internal threshold.
In single-ended mode, the maximum input signal should be 32 mV peak-to-peak.