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The LMC6772AIMX/NOPB is a dual micro-power rail-to-rail input CMOS comparator manufactured by Texas Instruments. It operates within a supply voltage range of 2.7 V to 15 V and consumes only 20 µA of operating current. The device features an open-drain output type and is housed in an 8-SOIC package. Key electrical specifications include a maximum input offset voltage of 5 mV at 5 V, an input bias current of 400 fA, and a propagation delay of 4 µs. It provides typical common-mode rejection ratio (CMRR) of 75 dB and power supply rejection ratio (PSRR) of 80 dB. The component functions reliably across a temperature range of -40°C to +85°C.
Verify the specific suffix 'NOPB' indicates lead-free and RoHS compliance as per Texas Instruments standards. Confirm the 'IMX' designation corresponds to the tape-and-reel packaging format suitable for automated surface-mount assembly. Ensure the source document explicitly lists this part number as active or end-of-life status to manage long-term availability risks.
Select this component when rail-to-rail input compatibility is required alongside minimal power draw. The open-drain output necessitates an external pull-up resistor; ensure the selected resistor value aligns with the desired switching speed and load requirements. Verify that the 4 µs propagation delay meets the timing constraints of the target application compared to faster comparator alternatives.
This device belongs to the LMC6772 series of dual comparators from Texas Instruments. It shares the same functional architecture as the LMC6772AIM/NOPB but differs in packaging, utilizing an 8-SOIC reel configuration instead of tube packaging. The series is characterized by its CMOS technology, offering high input impedance and low static current consumption suitable for precision analog applications.
The LMC6772AIM/NOPB serves as a direct pin-compatible alternative with identical electrical characteristics, differing primarily in shipping packaging. Designers should verify that any substitute components maintain the 2.7 V minimum supply voltage and open-drain output topology to ensure circuit compatibility without redesign.