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Product Detailed Parameters
- Description：2-input 2-output LP-HCSL clock
- Series：LMKDB1xxx
- PLL：No
- Mfr：Texas Instruments
- Main Purpose：PCI Express (PCIe)
- Input：Clock
- Output：LP-HCSL
- Number of Circuits：1
- Ratio - Input:Output：2:02
- Differential - Input:Output：Yes/Yes
- Frequency - Max：400MHz
- Voltage - Supply：1.71V ~ 1.89V, 2.97V ~ 3.6V
- Operating Temperature：-40°C ~ 105°C (TA)
- Mounting Type：Surface Mount
- Package / Case：20-VFQFN Exposed Pad
- Supplier Device Package：20-VQFN (3x3)
- Grade：-
- Qualification：-
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Overview
The LMKDB1202 is a low-power LP-HCSL clock multiplexer supporting PCIe Gen 1 through Gen 7 architectures. It features two differential inputs and two differential outputs with selectable 85Ω or 100Ω output impedance. The device provides extremely low additive jitter, reaching 2.1fs maximum for PCIe Gen 7 at 156.25MHz. It supports both Common Clock (CC) and Independent Reference (IR) configurations, includes fail-safe inputs, and offers individual output enable controls alongside automatic output disable functionality upon loss of signal detection.
Feature Summary
- Supports PCIe Gen 1 to Gen 7 with DB2000QL compliance
- Extremely low additive jitter: 31fs max (12kHz-20MHz RMS)
- Dual differential inputs and dual LP-HCSL outputs
- Selectable 85Ω or 100Ω output impedance
Applications
- High Performance Computing systems
- Server Motherboards
- NIC/SmartNIC designs
- Hardware Accelerators
Procurement Notes
Verify the REY suffix corresponds to the VQFN-20 package during procurement. Confirm power supply requirements match the 1.8V or 3.3V ±10% specifications. Ensure ESD handling protocols are followed due to the component's sensitivity.
Selection Notes
Select this model when only two differential outputs are required from two input sources. Choose between 85Ω and 100Ω impedance based on the target PCB trace design. Verify that the operating temperature range of -40°C to 105°C meets the environmental constraints of the application.
Part Context
This component belongs to the LMKDB12xx family, which includes the LMKDB1204 and LMKDB1208 variants. These devices share similar core functionalities but differ in the number of available outputs. The LMKDB1202 specifically provides a compact solution for applications requiring minimal output channels while maintaining ultra-low jitter performance.
Replacement Considerations
LMKDB1204REX
FAQ
What is the maximum additive jitter specification?
The maximum additive jitter is 31fs RMS from 12kHz to 20MHz at 156.25MHz.
How is the output impedance configured?
The output impedance can be selected as either 85Ω or 100Ω using the ZOUT_SEL pin.
Does the device support spread spectrum clocking?
Yes, the device supports input clocks with or without Spread Spectrum Clocking (SSC).
