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LMX1600TM/NOPB is listed in the Clock Generators, PLLs, Frequency Synthesizers range at ChipApex. The manufacturer field lists Texas Instruments. Its product description is IC PLL FREQ SYNTH 16TSSOP. Review the specifications below when checking this part for your BOM.
The LMX1600TM/NOPB is a dual frequency synthesizer from the PLLatinum family, designed for local oscillator subsystems in radio transceivers. It operates on a single supply voltage ranging from 2.7V to 3.6V with typical current consumption of 5.0 mA at 3V. The device integrates two phase-locked loops (Main and Aux) featuring dual modulus prescalers, programmable counters, and selectable gain charge pumps. It supports Main frequencies up to 2.0 GHz and Aux frequencies up to 500 MHz or 1.1 GHz depending on configuration. Data is programmed via a MICROWIRE serial interface.
This component is classified as obsolete by Texas Instruments. Verify availability through authorized distributors or secondary markets. Confirm that the specific TM suffix variant matches the required package type and electrical specifications before procurement. Ensure compliance with RoHS standards if applicable to the end application.
Select this device when a low-cost dual frequency synthesizer is required for mobile communication applications. Compare the LMX1600 against the LMX1601 and LMX1602 variants based on the specific Main and Aux frequency requirements. Ensure the external VCO and loop filter components are compatible with the integrated charge pump characteristics and prescaler limits.
The LMX1600 belongs to the PLLatinum family of monolithic dual frequency synthesizers fabricated using TI's 0.5u ABiC silicon BiCMOS process. It shares functional similarities with the LMX1601 and LMX1602, differing primarily in the supported frequency ranges of the Main and Aux loops. The device is housed in a 16-pin TSSOP surface mount plastic package.
Direct replacements may be limited due to the obsolete status. Consider evaluating the LMX1601 or LMX1602 if their frequency ranges align with the design requirements. Verify pin compatibility and register programming sequences when migrating between these family members.
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