LMX2350SLBX

Clock Generators, PLLs, Frequency Synthesizers Overview

The LMX2350SLBX is a dual low power frequency synthesizer featuring a Fractional N RF PLL and an Integer N IF PLL. It operates on a 2.7 V to 5.5 V supply with typical current consumption of 6.75 mA for the LMX2350 and 5.00 mA for the LMX2352 at 3.0 V. The device supports RF frequencies up to 2.5 GHz (LMX2350) or 1.2 GHz (LMX2352) and IF frequencies up to 550 MHz. It includes programmable charge pumps, fractional compensation circuitry, and a MICROWIRE serial interface.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Dual PLL architecture combining a Fractional N RF loop with an Integer N IF loop
• Modulo 15 or 16 fractional compensation in the RF divider
• Programmable charge pump currents ranging from 100 µA to 1.6 mA
• Digital filtered lock detect function

Clock Generators, PLLs, Frequency Synthesizers Applications

• Portable wireless communications systems
• Dual mode cellular telephone systems
• Zero blind slot TDMA systems
• Spread spectrum communication systems
• Cable TV Tuners

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific ordering suffix against the manufacturer's official documentation to confirm package type and temperature range. Ensure the component matches the required RF and IF frequency specifications for your design. Cross-reference the datasheet revision number to guarantee compatibility with intended control logic and electrical characteristics.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select the LMX2350 variant for applications requiring RF operation up to 2.5 GHz. Choose the LMX2352 variant if the maximum RF frequency requirement is 1.2 GHz. Both variants support IF synthesis up to 550 MHz. Consider the available prescaler ratios when determining the achievable frequency step sizes and phase detector frequencies for the target application.

Clock Generators, PLLs, Frequency Synthesizers Part Context

This component belongs to the Texas Instruments PLLatinum family of frequency synthesizers. It utilizes a silicon BiCMOS process to integrate dual modulus prescalers and fractional compensation circuitry. The device is designed as a local oscillator subsystem for radio transceivers, providing stable low noise control signals for external voltage controlled oscillators.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Public confirmed substitute part numbers are not available in the provided documentation.