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LTC1743CFW#TRPBF is listed in the Analog To Digital Converters (ADC) range at ChipApex. The manufacturer field lists Analog Devices Inc.. Its product description is IC ADC 12BIT PIPELINED 48TSSOP. Review the specifications below when checking this part for your BOM.
The LTC1743CFW#TRPBF is a 50Msps, 12-bit pipelined analog-to-digital converter (ADC) from Analog Devices Inc. It operates on a single 5V supply with a power dissipation of 1000mW. The device features selectable differential input ranges of ±1V or ±1.6V and includes an internal 2.5V reference. Key performance metrics include a signal-to-noise ratio (SNR) of 72.5dB and spurious-free dynamic range (SFDR) of 85dB at a 5MHz input in the 3.2V range. It utilizes a 48-lead TSSOP package and supports digital interfaces compatible with 5V, 3V, and 2V logic systems.
Verify the 'CFW' suffix indicates the commercial temperature range (0°C to 70°C) and the 48-lead TSSOP package. Confirm the '#TRPBF' designation corresponds to the reel packaging format. Ensure compatibility with the required 5V analog supply and appropriate digital output voltage levels (OVDD).
Select this component when a 50Msps sampling rate and 12-bit resolution are required for wide dynamic range signals. Choose the ±1.6V range by connecting SENSE to VDD for maximum input swing, or ±1V for lower amplitude signals. Ensure the source impedance is matched and kept below 100Ω per input to maintain specified SFDR performance.
The LTC1743 belongs to a pin-compatible family of high-speed ADCs. It shares the same footprint as the 14-bit LTC1746/1744 (25Msps/50Msps) and the 12-bit LTC1745/1742/1741 (25Msps/65Msps/80Msps). This allows for design flexibility across different speed and resolution requirements without changing the board layout.
Direct pin-compatible replacements within the same family include the LTC1745 (12-bit, 25Msps) for lower speed applications. For higher resolution, the LTC1744 (14-bit, 50Msps) is available. Verify that the specific temperature grade and package variant match the original design constraints.
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