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LTC2064IDD#TRPBF is listed in the Instrumentation, Op Amps, Buffer Amps range at ChipApex. The manufacturer field lists Analog Devices Inc.. Its product description is IC OPAMP ZERO-DRIFT 2 CIRC 10DFN. Review the specifications below when checking this part for your BOM.
The LTC2064IDD#TRPBF is a dual-channel, zero-drift operational amplifier from Analog Devices. It operates on a supply voltage range of 1.7V to 5.25V with a maximum supply current of 2µA per amplifier. The device features rail-to-rail input and output capabilities, an integrated EMI filter providing 114dB rejection at 1.8GHz, and a shutdown mode drawing less than 170nA. It utilizes self-calibrating circuitry to achieve a maximum input offset voltage of 5µV and low drift. The component is housed in a 10-lead (3mm × 3mm) plastic DFN package.
Verify the specific suffix #TRPBF indicates tape and reel packaging when sourcing. Confirm the 'I' grade designation corresponds to the –40°C to 85°C operating temperature range required for your application. Ensure the 10-lead DFN package dimensions match your PCB footprint constraints before finalizing procurement.
Select this part for dual-channel precision requirements where low quiescent current is critical. The zero-drift technology is suitable for high-impedance sensor interfaces requiring minimal bias current errors. Consider the thermal resistance characteristics of the DFN package if operating near the upper temperature limits or under heavy load conditions.
This component belongs to the LTC2063/LTC2064/LTC2065 family of micropower precision amplifiers. While sharing core electrical specifications, the LTC2064 specifically offers two channels in compact packages like the 10-lead DFN. This distinguishes it from the single-channel LTC2063 and the quad-channel LTC2065, offering a balance between channel count and board space efficiency.
LTC2064HDD#TRPBF: Offers the same electrical performance but specified for an extended temperature range of –40°C to 125°C.
The internal chopping frequency is 5kHz. Advanced circuit techniques suppress spurious artifacts associated with this frequency, allowing for trouble-free use without significant idle tones affecting the signal path.
It is recommended not to float the SHDN pin. Tying it to V+ enables the amplifier, while tying it to V– disables it to minimize power consumption.
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