LTC2144IUP-12#PBF

Analog To Digital Converters (ADC) Overview

The LTC2144IUP-12#PBF is a dual-channel, simultaneous sampling 12-bit analog-to-digital converter (ADC) from Analog Devices. Operating at a maximum sampling rate of 105Msps, it features a pipeline architecture with a 750MHz full-power bandwidth sample-and-hold circuit. The device supports selectable input ranges from 1Vp-p to 2Vp-p and offers CMOS, DDR CMOS, or DDR LVDS digital output interfaces. It operates on a single 1.8V supply with typical power dissipation of 144mW. Key performance metrics include a signal-to-noise ratio (SNR) of 70.6dB and a spurious-free dynamic range (SFDR) of 89dB.

Analog To Digital Converters (ADC) Feature Summary

• Dual-channel simultaneous sampling with 12-bit resolution and 105Msps throughput
• High AC performance: 70.6dB SNR and 89dB SFDR at 70MHz input
• Low power consumption: 144mW total (72mW per channel) at 105Msps
• Flexible digital outputs: Full-rate CMOS, DDR CMOS, or DDR LVDS modes

Analog To Digital Converters (ADC) Applications

• Cellular base stations
• Software-defined radios
• Portable medical imaging systems
• Multi-channel data acquisition
• Nondestructive testing

Analog To Digital Converters (ADC) Procurement Notes

Verify the package type is the 64-lead (9mm × 9mm) plastic QFN with an exposed ground pad. Confirm the temperature grade corresponds to the 'I' suffix for industrial operation (-40°C to 85°C). Ensure the '#PBF' suffix indicates lead-free finish and tube packaging as specified in the ordering information.

Analog To Digital Converters (ADC) Selection Notes

Select this model over the LTC2145-12 if a lower sampling rate of 105Msps is sufficient, as it offers reduced power consumption (144mW vs 183mW). Choose the LTC2143-12 variant if an even lower sampling rate of 80Msps is acceptable for further power savings. Ensure the system requires dual-channel simultaneous sampling rather than single-channel high-speed conversion.

Analog To Digital Converters (ADC) Part Context

This component belongs to the LTC214x-12 family of low-power dual ADCs, which also includes the LTC2145-12 (125Msps) and LTC2143-12 (80Msps). All variants share identical pinouts, architectures, and feature sets, differing primarily in their maximum sampling frequencies and associated power dissipation levels.

Analog To Digital Converters (ADC) Replacement Considerations

LTC2145CUP-12#PBF

Analog To Digital Converters (ADC) FAQ

What are the available digital output interface options?

The LTC2144IUP-12 supports three digital output modes: full-rate CMOS, double data rate (DDR) CMOS, and double data rate (DDR) LVDS.

How does the device handle clock duty cycle variations?

An optional clock duty cycle stabilizer can be enabled via the CS pin to maintain high performance across a wide range of clock duty cycles.

What is the function of the PAR/SER pin?

The PAR/SER pin selects the programming mode. Connecting it to ground enables serial programming mode, while connecting it to VDD enables parallel programming mode.