LTC2621IDD-1#PBF

Overview

The LTC2621IDD-1#PBF is a single-channel, 12-bit rail-to-rail voltage output digital-to-analog converter (DAC) from Analog Devices. It operates on a 2.5V to 5.5V supply and features a built-in high-performance output buffer capable of sourcing or sinking at least 15mA. The device utilizes a simple SPI/Microwire compatible 3-wire serial interface with clock rates up to 50MHz. Key specifications include a settling time of 7µs, differential nonlinearity (DNL) of ±0.5 LSB, and integral nonlinearity (INL) of ±0.8 LSB. The -1 suffix indicates an integrated power-on reset circuit that sets the output to midscale upon initialization.

Feature Summary

• 12-bit resolution with guaranteed monotonicity over temperature
• Power-on reset to midscale for LTC2621-1 variants
• Rail-to-rail output drive with ±15mA minimum current capability
• Low power consumption: 300µA typical at 3V, down to 1µA in power-down mode

Applications

• Mobile communications systems
• Process control and industrial automation
• Instrumentation equipment
• Automatic test equipment

Procurement Notes

Verify the specific ordering suffix to confirm package type and lead finish. The '#PBF' suffix denotes a lead-free finish and tube packaging. Ensure the '-1' suffix is present if midscale power-on reset functionality is required for the application design.

Selection Notes

Select this component when a single-channel, high-density 12-bit DAC is needed with rail-to-rail output swing. Compare against LTC2601 (16-bit) or LTC2611 (14-bit) if higher resolution is required. Verify that the 3-wire serial interface timing meets the system's microcontroller or DSP capabilities.

Part Context

This part belongs to the LTC2601/LTC2611/LTC2621 family of 16/14/12-bit DACs. They share pin compatibility and similar electrical characteristics, differing primarily in resolution. The LTC2621 offers the lowest resolution but maintains the same small 10-lead DFN footprint and performance metrics as its higher-resolution counterparts.

Replacement Considerations

LTC2621CDD-1#PBF (Commercial grade, 0°C to 70°C)

FAQ

What is the default output state after power-up?

For the LTC2621-1 variant, the power-on reset circuit sets the voltage outputs to midscale until a valid write and update command are executed.

How does the LDAC pin function?

The LDAC pin allows for asynchronous DAC updates. A falling edge on LDAC immediately updates the DAC register with the contents of the input register, independent of the CS/LD signal state.

What is the maximum serial clock frequency?

The serial interface supports clock rates up to 50MHz.