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Product Detailed Parameters
- Description:IC DAC 16BIT V-OUT 8MSOP
- Series:-
- Mfr:Analog Devices Inc.
- Package:Tube
- Number of Bits:16
- Number of D/A Converters:1
- Settling Time:1µs (Typ)
- Output Type:Voltage - Unbuffered
- Differential Output:No
- Data Interface:SPI
- Reference Type:External
- Voltage - Supply, Analog:2.7V ~ 5.5V
- Voltage - Supply, Digital:2.7V ~ 5.5V
- INL/DNL (LSB):±0.5, ±0.5
- Architecture:R-2R
- Operating Temperature:0°C ~ 70°C
- Package / Case:8-TSSOP, 8-MSOP (0.118", 3.00mm Width)
- Supplier Device Package:8-MSOP
- Mounting Type:Surface Mount
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Overview
The LTC2641CMS8-16#PBF is a 16-bit unbuffered voltage output digital-to-analog converter (DAC) from Analog Devices. It operates on a single 2.7V to 5.5V supply with a typical supply current of 120µA. The device features a 3-wire SPI/MICROWIRE compatible serial interface supporting clock rates up to 50MHz. Key electrical specifications include a maximum integral nonlinearity (INL) error of ±1LSB and a differential nonlinearity (DNL) error of ±1LSB over temperature. The DAC settles to within 0.5LSB in 1µs and includes a power-on reset circuit that clears the output to zero scale.
Feature Summary
- 16-bit resolution with guaranteed monotonic operation over temperature
- Unbuffered voltage output directly drives loads greater than 60kΩ
- Low glitch impulse of 0.5nV·sec during major carry transitions
- Asynchronous CLR pin clears DAC output to zero scale
Applications
- Process control and industrial automation
- Automatic test equipment
- Data acquisition systems
Procurement Notes
Verify the package type matches the design requirements, as this specific part number corresponds to the 8-lead MSOP package. Confirm the commercial temperature range (0°C to 70°C) aligns with the application environment. Ensure the external reference voltage input remains between 2V and VDD for proper operation.
Selection Notes
Select this component when high linearity is required without the power consumption of a buffered output. The unbuffered architecture minimizes offset and gain errors but requires careful management of load resistance to maintain specified INL/DNL performance. Verify that the system can accommodate the 6.2kΩ output source resistance.
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