LTC6945IUFD#TRPBF

Clock Generators, PLLs, Frequency Synthesizers Overview

The LTC6945IUFD#TRPBF is an ultralow noise and spurious integer-N synthesizer with an integrated VCO output divider, manufactured by Analog Devices Inc. It operates as a high-performance phase-locked loop (PLL) covering a frequency range from 0.35 GHz to 6 GHz. The device features a buffered programmable VCO output divider with a range of 1 through 6 and a differential low-noise output buffer with user-programmable power levels ranging from –6 dBm to 3 dBm. It includes a low-noise reference buffer that outputs a typical 0 dBm square wave directly into a 50 Ω impedance from 10 MHz to 250 MHz. All settings are controlled via an SPI-compatible serial port.

Clock Generators, PLLs, Frequency Synthesizers Feature Summary

• Ultralow Noise and Spurious: Achieves –226 dBc/Hz normalized in-band phase noise floor and –274 dBc/Hz normalized in-band 1/f noise.
• Integrated VCO Output Divider: Features a buffered, programmable output divider with a range of 1 through 6 for flexible frequency generation.
• Low Noise Reference Buffer: Outputs a typical 0 dBm square wave directly into a 50 Ω impedance from 10 MHz to 250 MHz.
• Configurable Charge Pump: Contains selectable high and low voltage clamps useful for VCO monitoring and can be set to provide a V+/2 bias.

Clock Generators, PLLs, Frequency Synthesizers Applications

• Wireless Base Stations (LTE, WiMAX, W-CDMA, PCS)
• Broadband Wireless Access
• Microwave Data Links
• Military and Secure Radio
• Test and Measurement

Clock Generators, PLLs, Frequency Synthesizers Procurement Notes

Verify the specific ordering suffix #TRPBF indicates tape and reel packaging when sourcing this component. Confirm the manufacturer is Analog Devices Inc. or its predecessor Linear Technology. Ensure the part number matches the exact specifications for the 0.35 GHz to 6 GHz integer-N synthesizer variant.

Clock Generators, PLLs, Frequency Synthesizers Selection Notes

Select the LTC6945IUFD#TRPBF for applications requiring ultralow noise performance up to 6 GHz. Ensure the design supports the required supply voltages: 3.15 V to 5.25 V for the charge pump and 3.15 V to 3.45 V for other supplies. Verify compatibility with the SPI interface for configuration and consider using the PLLWizard software tool for design optimization.

Clock Generators, PLLs, Frequency Synthesizers Part Context

The LTC6945 is part of the LTC6945 series of clock generators and synthesizers. It is designed for high-performance PLL applications, offering superior integrated phase noise due to its extremely low in-band phase noise performance. The device integrates a reference divider, phase-frequency detector, charge pump, integer feedback divider, and VCO output divider.

Clock Generators, PLLs, Frequency Synthesizers Replacement Considerations

Public confirmed substitute part numbers are not available in the provided documentation. Consult Analog Devices marketing for parts specified with wider operating temperature ranges or non-standard lead-based finish parts.

Clock Generators, PLLs, Frequency Synthesizers FAQ

What is the output divider range of the LTC6945?

The LTC6945 features a buffered, programmable VCO output divider with a range of 1 through 6.

How is the reference input configured?

The reference inputs (REF+, REF–) are self-biased and must be AC-coupled with 1µF capacitors. They can be used differentially or single-ended by bypassing REF– to GND with a 1µF capacitor.

What is the function of the STAT pin?

The STAT pin provides a configurable status output, which is a logical OR combination of the UNLOCK, LOCK, THI, and TLO status bits, programmable via the STATUS register.