MAX7407CPA+

Overview

The MAX7407CPA+ is an 8th-order lowpass elliptic switched-capacitor filter operating from a single +3V supply. It provides a sharp rolloff with a transition ratio of 1.2 and typical stopband rejection of 60dB. The corner frequency is tunable from 0.001kHz to 10kHz via a clock input, maintaining a 100:1 clock-to-corner ratio. Supply current is 2mA in normal mode and reduces to 0.2µA in shutdown. It features a low output offset voltage of ±5mV and includes an offset adjustment pin for DC level shifting.

Feature Summary

• 8th-order lowpass elliptic response with steep rolloff
• Single +3V supply operation with low power consumption
• Clock-tunable corner frequency from 1Hz to 10kHz
• Integrated shutdown mode for ultra-low standby current

Applications

• ADC anti-aliasing
• Post-DAC filtering
• Speech processing
• Air-bag electronics
• CT2 base stations

Procurement Notes

Verify the component status before procurement as it may be obsolete or end-of-life. Confirm the package type matches the design requirements. Check RoHS compliance details if required by local regulations. Ensure the supplier source is authorized to avoid counterfeit parts.

Selection Notes

Select this part when a single +3V supply is available and high selectivity is needed. Compare against MAX7400/MAX7403 if a +5V supply is preferred. Consider MAX7404 if a transition ratio of 1.5 is acceptable. Verify that the external clock circuitry meets the duty cycle requirements.

Part Context

This device belongs to the MAX7400 family of 8th-order lowpass elliptic filters. It shares the same architecture and pinout as other variants but is optimized for +3V operation. The 'CPA+' suffix indicates a plastic DIP-8 package with commercial temperature range and lead-free construction.

Replacement Considerations

MAX7407EPA (Extended Temperature Range)

FAQ

How is the corner frequency determined?

The corner frequency is set by the clock frequency divided by 100. It can be controlled by an external clock signal or an internal oscillator set by a capacitor on the CLK pin.

What is the purpose of the OS pin?

The OS pin allows for offset adjustment. Connecting it to COM sets the default offset, while applying an external bias voltage shifts the DC output level.

How does the shutdown mode work?

Driving the SHDN pin low activates shutdown mode, reducing supply current to 0.2µA and placing the output in a high-impedance state. Driving it high returns the device to normal operation.