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The MAX7426CUA+ is a fifth-order, lowpass, elliptic switched-capacitor filter designed for single-supply operation at +5V. It features a clock-to-corner frequency ratio of 100:1, enabling corner frequencies from 0.001kHz to 9kHz with an internal oscillator or external clock input. The device delivers -81dB typical total harmonic distortion plus noise and provides approximately 37dB of stopband rejection with a transition ratio of 1.25. Operating supply current is 0.8mA in active mode, reducing to 0.2µA in shutdown mode. The component operates within a temperature range of 0°C to +70°C and is housed in an 8-pin µMAX package.
Verify the specific suffix 'CUA+' against the manufacturer's official documentation to confirm the commercial temperature range (0°C to +70°C) and the 8-pin µMAX surface-mount package configuration. Ensure that the ordering information matches the exact part number required for your design specifications before finalizing procurement.
Select this component when a fixed fifth-order elliptic response is required for low-power applications. The MAX7426 is specifically intended for +5V single-supply systems, whereas the MAX7427 variant supports +3V supplies. Designers must account for the 100:1 clock-to-corner frequency ratio when determining the necessary clock source frequency for the desired cutoff point.
This component belongs to the MAX7426/MAX7427 family of switched-capacitor filters manufactured by Analog Devices / Maxim Integrated. These devices utilize a passive ladder emulation architecture using switched-capacitor integrators to achieve low component sensitivity compared to cascaded biquadratic designs. The family includes variants for both +5V and +3V operations.
The MAX7427CUA+ serves as the functional equivalent for +3V single-supply applications within the same family. Other Maxim integrated filters such as the MAX291 or MAX292 series may be considered for dual-supply requirements, though they differ in voltage and package specifications.
The corner frequency is set by the clock frequency divided by a fixed ratio of 100:1. This can be achieved using an external clock or an internal oscillator defined by a capacitor connected to the CLK pin.
The Offset Adjust (OS) pin allows for the adjustment of the DC output level. It should be connected to the COM pin if no offset adjustment is needed, or biased via a resistive divider for DC level shifting.
Driving the SHDN pin low activates the low-power shutdown mode, reducing supply current to 0.2µA and placing the output in a high-impedance state. Driving it high or connecting it to VDD enables normal operation.